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EPC1441

Altera Corporation

Configuration Devices

Configuration Devices for ® SRAM-Based LUT Devices Data Sheet December 2002, ver. 12.2 Features ■ ■ ■ ■ ■ ■ ■ ■ ...


Altera Corporation

EPC1441

File Download Download EPC1441 Datasheet


Description
Configuration Devices for ® SRAM-Based LUT Devices Data Sheet December 2002, ver. 12.2 Features ■ ■ ■ ■ ■ ■ ■ ■ Serial device family for configuring APEXTM II, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), MercuryTM, ACEX® 1K, and FLEX® (FLEX 6000, FLEX 10KE, and FLEX 10KA) devices Easy-to-use 4-pin interface to APEX II, APEX 20K, Mercury, ACEX, and FLEX devices Low current during configuration and near-zero standby current 5.0-V and 3.3-V operation Software design support with the Altera® Quartus® II and MAX+PLUS® II development systems for Windows-based PCs as well as Sun SPARCstation, and HP 9000 Series 700/800 Programming support with Altera’s Master Programming Unit (MPU) and programming hardware from Data I/O, BP Microsystems, and other manufacturers Available in compact plastic packages (see Figures 1 and 2) – 8-pin plastic dual in-line package (PDIP) – 20-pin plastic J-lead chip carrier (PLCC) package – 32-pin plastic thin quad flat pack (TQFP) package – 100-pin plastic thin quad flat pack (TQPF) package – 88-pin Ultra FineLine BGATM package EPC2 device has reprogrammable Flash configuration memory – 5.0-V and 3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface – Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1 – ISP circuitry is compatible with IEEE Std. 1532 for EPC2 configuration device – Supports programming through Serial Vector Format Files (.svf)...




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