2N5064

DISCRETE SEMICONDUCTORS '$7$ 6+((7 2N5064 Thyristor sensitive gate Product specification October 1997 1;3 Semiconductors Thyristor sensitive gate Product specification 2N5064 GENERAL DESCRIPTION Glass passivated sensitive gate thyristor in a plastic envelope, intended for use in general purpose switching and phase control applications. This device is intended to be interfaced directly to microcontrollers, logic integreated circuits and other low power gate trigger circuits. QUICK REFERENCE DATA SYMBOL PARAMETER VDRM, VRRM IT(AV) IT(RMS) ITSM Repetitive peak off-state voltages Average on-state current RMS on-state current Non-repetitive peak on-state current MAX. UNIT 200 V 0.5 A 0.8 A 10 A PINNING - TO92 variant PIN DESCRIPTION 1 anode 2 gate 3 cathode PIN CONFIGURATION 3 21 SYMBOL a k g LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134). SYMBOL PARAMETER CONDITIONS VDRM, VRRM Repetitive peak off-state voltages IT(AV) IT(RMS) ITRM Average on-state current RMS on-state current Repetitive peak on-state current half sine wave Tc ≤ 67 ˚C Tc ≤ 102 ˚C all conduction angles ITSM Non-repetitive peak half sine wave; Ta = 25 ˚C prior to surge; on-state current t = 8.3 ms I2t I2t for fusing t = 8.3 ms IGM VGM VRGM PGM PG(AV) Tstg Tj Peak gate current Peak gate voltage Ta = 25˚C, tp = 300μs; f = 120 Hz Peak reverse gate voltage Peak gate power Average gate power Storage temperature Ta = 25˚C Ta = 25˚C, over ...