Document
PD - 95087A
IRLR/U3410PbF
l l l l l l l l
Logic Level Gate Drive Ultra Low On-Resistance Surface Mount (IRLR3410) Straight Lead (IRLU3410) Advanced Process Technology Fast Switching Fully Avalanche Rated Lead-Free
HEXFET® Power MOSFET
D
VDSS = 100V RDS(on) = 0.105Ω
G S
ID = 17A
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The D-PAK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. Parameter
ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current
Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
D-PAK TO-252AA
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I-PAK TO-251AA
Absolute Maximum Ratings
Max.
17 12 60 79 0.53 ± 16 150 9.0 7.9 5.0 -55 to + 175 300 (1.6mm from case )
Units
A W W/°C V mJ A mJ V/ns °C
Thermal Resistance
Parameter
RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB mount) ** Junction-to-Ambient
Typ.
––– ––– –––
Max.
1.9 50 110
Units
°C/W
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1
12/7/04
Datasheet pdf - http://www.DataSheet4U.co.kr/
IRLR/U3410PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
∆V(BR)DSS/∆TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Min. Typ. Max. Units Conditions 100 ––– ––– V VGS = 0V, ID = 250µA ––– 0.122 ––– V/°C Reference to 25°C, I D = 1mA ––– ––– 0.105 VGS = 10V, ID = 10A ––– ––– 0.125 W VGS = 5.0V, ID = 10A ––– ––– 0.155 VGS = 4.0V, ID = 9.0A 1.0 ––– 2.0 V VDS = VGS, ID = 250µA 7.7 ––– ––– S VDS = 25V, ID = 9.0A
––– ––– 25 VDS = 100V, VGS = 0V µA ––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C ––– ––– 100 VGS = 16V nA ––– ––– -100 VGS = -16V ––– ––– 34 ID = 9.0A ––– ––– 4.8 nC VDS = 80V ––– ––– 20 VGS = 5.0V, See Fig. 6 and 13
––– 7.2 ––– VDD = 50V ––– 53 ––– ID = 9.0A ns ––– 30 ––– RG = 6.0Ω, VGS = 5.0V ––– 26 ––– RD = 5.5Ω, See Fig. 10
Between lead, 4.5 nH 6mm (0.25in.) G from package ––– 7.5 ––– and center of die contact ––– 800 ––– VGS = 0V ––– 160 ––– pF VDS = 25V ––– 90 ––– ƒ = 1.0MHz, See Fig. 5
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D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)
Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 17 ––– ––– showing the A G integral reverse ––– ––– 60 p-n junction diode. S ––– ––– 1.3 V TJ = 25°C, IS = 9.0A, VGS = 0V ––– 140 210 ns TJ = 25°C, IF =9.0A ––– 740 1100 nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
max. junction temperature. ( See fig. 11 ) VDD = 25V, starting TJ = 25°C, L = 3.1mH RG = 25Ω, IAS = 9.0A. (See Figure 12) TJ ≤ 175°C
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%
Uses IRL530N data and test conditions
ISD ≤ 9.0A, di/dt ≤ 540A/µs, VDD ≤ V(BR)DSS, This is applied for I-PAK, LS of D-PAK is measured between lead and
center of die contact ** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994
2
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Datasheet pdf - http://www.DataSheet4U.co.kr/
IRLR/U3410PbF
100
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
100
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
10
10
2.5V
1
1
2.5V 20µs PULSE WIDTH T J = 25°C
1 10
0.1 0.1
100
A
0.1 0.1
20µs PULSE WIDTH T J = 175°C
1 10
100
A
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
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Fig 2. .