HMCAD1040-40
v01.0411
Dual 10-Bit 20/40 MSPS A/D Converter
Features
• 10-bit Resolution • 20/40 MSPS Maximum Sampling Rate • Ultra-Low Power Dissipation: 24/43 mW • 61.6 dB SNR @ 8 MHz • Internal Reference Circuitry • 1.8 V Core Supply Voltage • 1.7 – 3.6 V I/O Supply Voltage • Parallel CMOS Output
General Description
The HMCAD1040-40 is a high performance low power dual analog-to-digital converter (ADC). The ADC employs internal reference circuitry, a CMOS control interface, CMOS output data and is based on a proprietary structure. Digital error correction is employed to ensure no missing codes in the complete full scale range. Several idle modes with fast startup times exist. Each channel can be independently powered down and the entire chip can either be put in Standby Mode or Power Down mode. The different modes are optimized to allow the user to select the mode resulting in the lowest possible energy consumption during idle mode and startup. The HMCAD1040-40 has a highly linear THA optimized for frequencies up to Nyquist. The differential clock interface is optimized for low jitter clock sources and supports LVDS, LVPECL, sine wave and CMOS clock inputs.
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0
A / D Converters - SMT
• 9 x 9 mm 64-Pin QFN (LP9E) Package • Dual Channel
Typical Applications
• Medical Imaging • Portable Test Equipment • Digital Oscilloscopes • IF Communication
Pin compatible with HMCAD1040-80, HMCAD1050-40 and HMCAD1050-80.
Functional Diagram
Figure 1.Functional Block Diagram
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com Application Support:
[email protected]
0-1
Datasheet pdf - http://www.DataSheet4U.co.kr/
HMCAD1040-40
v01.0411
Dual 10-Bit 20/40 MSPS A/D Converter
Electrical Specifications DC Electrical Specifications
AVDD= 1.8V, DVDD= 1.8V, DVDDCK= 1.8V, OVDD= 2.5V, 20/40 MSPS clock, 50% clock duty cycle, -1 dBFS 8 MHz input signal, unless otherwise noted Parameter DC Accuracy No missing codes Offset error Gain error Gain matching DNL INL VCM Analog Input Input common mode Full scale range Input capacitance Bandwidth Power Supply Core Supply Voltage Supply voltage to all 1.8V domain pins. See Pin Configuration and Description
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Condition
Min.
Typ.
Max.
Units
Guaranteed Mid-scale offset Full scale range deviation from typical Gain matching between channels. ± 3 sigma value at worst case conditions Differential nonlinearity Integral nonlinearity Common mode voltage output ± 0.5 ± 0.15 ± 0.2 VAVDD/2 1 ±6 LSB %FS %FS LSB LSB V
0
A / D Converters - SMT
0-2
Datasheet pdf - http://www.DataSheet4U.co.kr/
Analog input common mode voltage Differential input voltage range Differential input capacitance Input Bandwidth
VCM -0.1 2.0 2 500
VCM +0.2
V Vpp pF MHz
1.7
1.8
2.0
V
I/O Supply Voltage
Output driver supply voltage (OVDD). Should be higher than or equal to Core Supply Voltage (VOVDD ≥ VDVDD)
1.7
2.5
3.6
V
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824 978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com Application Support:
[email protected]
HMCAD1040-40
v01.0411
Dual 10-Bit 20/40 MSPS A/D Converter
AC Electrical Specifications - 20 MSPS
AVDD= 1.8V, DVDD= 1.8V, DVDDCK= 1.8V, OVDD= 2.5V, FS= 20 MSPS clock, 50% clock duty cycle, -1 dBFS 8 MHz input signal, unless otherwise noted. Parameter Performance SNR Condition Signal to Noise Ratio FIN = 2 MHz FIN = 8 MHz FIN =~ FS/2 FIN = 20 MHz Signal to Noise and Distortion Ratio FIN = 2 MHz FIN = 8 MHz FIN =~ FS/2 FIN = 20 MHz Spurious Free Dynamic Range FIN = 2 MHz FIN = 8 MHz FIN =~ FS/2 FIN = 20 MHz Second order Harmonic Distortion FIN = 2 MHz FIN = 8 MHz FIN =~ FS/2 FIN = 20 MHz Third order Harmonic Distortion
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Min.
Typ.
Max.
Units
60
61.7 61.6 61.6 61.6 61.7 61.6 60.5 61.6 80 81 70 80 -90 -90 -90 -90 -80 -81 -70 -80 10.0 9.9 9.8 9.9 -105
dBFS dBFS dBFS dBFS dBFS dBFS dBFS dBFS dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc bits bits bits bits dB
SNDR
60
0
A / D Converters - SMT
SFDR
70
HD2
-80
HD3
ENOB
Crosstalk Power Supply Analog supply current Digital supply current Output driver supply Output driver supply Analog power Dissipation Digital power Dissipation Total power Dissipation Power Down Dissipation Sleep Mode 1 Sleep Mode 2 Clock Inputs Max. Conversion Rate Min. Conversion Rate
FIN = 2 MHz FIN = 8 MHz FIN =~ FS/2 FIN = 20 MHz Effective number of Bits FIN = 2 MHz FIN = 8 MHz FIN =~ FS/2 FIN = 20 MHz Signal crosstalk between channels, FIN1=8MHz, FIN0=9.9MHz
-70
9.7
8.2 Digital core supply 2.5V output driver supply, sine wave input, FIN = 1 MHz, CK_EXT enabled 2.5V output driver supply, sine wave input, FIN = 1 MHz, CK_EXT disabled OVDD = 2.5V, 5pF load on output bits, FIN = 1 MHz, CK_EXT disabled OVDD = 2.5V, 5pF load on output bits, FIN = 1 .