Reset Value: 
Figure 9. Status register
The status register stores diagnostic information. It can be read to check the status of the
run-time of the device (faults, warning, transmission corrupted, etc.).
When a fault condition occurs, a bit (corresponding to the fault condition) in the status
register is set and an interrupt (via the IRQ pin) is generated.
If there is no persistent fault condition, the status register is cleared after a successful
Bit 7 = PO: Power-on (L+ line).
This bit indicates the status of L+ line voltage.
If the voltage goes under the lower threshold (VLTHOFF) and ENL+ is
high, the PO bit is set. It is reset after a successful current read if the L+
voltage has returned above the upper threshold VLTHON and the read
operation has begun after the bit has been set.
When the PO bit is high, IRQ is generated.
During ENL+ transition (from low-level to high-level) and during L+ line
voltage transition, a fault condition is reported setting the PO bit and
activating the IRQ pin. To reset the fault a successful current read is
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