25HPK5361-A-155.520

Differential LVPECL Crystal Clock Oscillators HPK5361 Series 200 fsec Jitter +2.5V +3.3V “K” Family ‹ Femto second integrated phase jitter (200 fs typical, 12 KHz to 20 MHz) ‹ Superior phase noise (-138 dBc/Hz at 10 KHz and -144 dBc/Hz at 100 KHz offset). ‹ High performance with surprisingly low price. ‹ 2.5V or 3.3V supply voltage. General Specifications Product Series Frequency Range Output Logic Frequency Stability vs Operating Temperature Range MERCURY Since 1973 Supply Voltage VCC Output Voltage HIGH “1”, VOH Output Voltage LOW “0”, VOL Output Swing Current Consumption Load Rise Time (Tr) Fall Time (Tf) Duty Cycle Tri-state Function on pad No. 1 Phase Jitter (RMS) SSB Phase Noise (dBc/Hz). Typical Start-up Time Aging (1)Inclusive HPK5361; “K” family characteristics. Tri-State on pad 1 40 MHz ~ 200 MHz. Differential PECL square wave Commercial “ C ”:: Industrial “ I ”: Stability Code -10°C to +70°C -40°C to +85°C ±25 ppm A D ±50 ppm B E ±100 ppm C F Custom ±xx ppm Cxx Ixx If custom, use “temperature range code + desired stability in ppm” for the stability code. Example: “C20” (±20 ppm over -10 to +70°C). +2.5 V ± 5 % (Voltage code is “25”); or +3.3 V ± 5 % (Voltage code is “3”) VDD-1.025 V min.; VDD-0.95 V typical; VDD-0.88 V max. Condition: 50 ohms to VDD-2V VDD-1.810 V min.; VDD-1.70 V typical; VDD-1.62 V max. Condition: 50 ohms to VDD-2V 595 mV min; 750 mV typical; 930 mV max. 35 mA typical; 50 mA max. 50 ohms into VCC-2V or Thevenin equivalent (terminating resistor...