Document
Data Sheet
Dual Input Multiservice Line Card Adaptive Clock Translator
AD9557
FEATURES
Supports GR-1244 Stratum 3 stability in holdover mode Supports smooth reference switchover with virtually
no disturbance on output phase Supports Telcordia GR-253 jitter generation, transfer, and
tolerance for SONET/SDH up to OC-192 systems Supports ITU-T G.8262 synchronous Ethernet slave clocks Supports ITU-T G.823, G.824, G.825, and G.8261 Auto/manual holdover and reference switchover 2 reference inputs (single-ended or differential) Input reference frequencies: 2 kHz to 1250 MHz Reference validation and frequency monitoring (1 ppm) Programmable input reference switchover priority 20-bit programmable input reference divider 2 pairs of clock output pins, with each pair configurable as
a single differential LVDS/HSTL output or as 2 single-ended CMOS outputs Output frequencies: 360 kHz to 1250 MHz Programmable 17-bit integer and 23-bit fractional feedback divider in digital PLL Programmable digital .