Document
PD‐97745
12A Highly Integrated SupIRBuck Single‐Input Voltage, Synchronous Buck Regulator - 1 -`
IR3894
FEATURES
Single 5V to 21V application Wide Input Voltage Range from 1.0V to 21V with external Vcc Output Voltage Range: 0.5V to 0.86* Vin Enhanced Line/Load Regulation with Feed‐Forward Programmable Switching Frequency up to 1.5MHz Internal Digital Soft‐Start/Soft‐Stop Enable input with Voltage Monitoring Capability Thermally Compensated Current Limit with robust hiccup mode over current protection Smart internal LDO to improve light load and full load efficiency External Synchronization with Smooth Clocking Enhanced Pre‐Bias Start‐Up Precision Reference Voltage (0.5V+/‐0.5%) with margining capability Vp for Tracking Applications ((Source/Sink Capability +/‐12A) Integrated MOSFET drivers and Bootstrap Diode Thermal Shut Down Programmable Power Good Output with tracking capability Monotonic Start‐Up Operating temp: ‐40oC < Tj < 125oC Small Size: 5mm x 6mm PQFN Lead‐free, Halogen‐free and RoHS Compliant
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The IR3894 SupIRBuckTM is an easy‐to‐use, fully integrated and highly efficient DC/DC regulator. The onboard PWM controller and MOSFETs make IR3894 a space‐efficient solution, providing accurate power delivery. IR3894 is a versatile regulator which offers programmable switching frequency and the fixed internal current limit The switching frequency is programmable from 300 kHz to 1.5MHz for an optimum solution. It also features important protection functions, such as Pre‐Bias startup, thermally compensated current limit over voltage protection and thermal shutdown to give required system level security in the event of fault conditions.
DESCRIPTION
APPLICATIONS
Netcom Applications Embedded Telecom Systems Server Applications Storage Applications Distributed Point of Load Power Architectures
BASIC APPLICATION
Figure 1: IR3894 Basic Application Circuit
Figure 2: IR3894 Efficiency
1
AUGUST 08, 2012 | DATA SHEET | Rev 3.1
Datasheet pdf - http://www.DataSheet4U.co.kr/
PD‐97745
12A Highly Integrated SupIRBuck Single‐Input Voltage, Synchronous Buck Regulator - 2 -`
IR3894
ORDERING INFORMATION
IR3894 ―
Package M M
Tape & Reel Qty 750 4000
Part Number IR3894MTR1PBF IR3894MTRPBF
PBF – Lead Free TR/TP1 – Tape and Reel M – Package Type
PIN DIAGRAM 5m x 6mm POWER QFN (TOP VIEW)
w w w . D a t a S h e e t . n e t /
Fb
Vref Comp Gnd Rt/SyncS_Ctrl PGood
JA 30C / W J - PCB 2C / W
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AUGUST 08, 2012 | DATA SHEET | Rev 3.1
D a t a s h e e t p d f -
h t t p : / / w w w . D a
PD‐97745
12A Highly Integrated SupIRBuck Single‐Input Voltage, Synchronous Buck Regulator - 3 -`
IR3894
BLOCK DIAGRAM
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Figure 3: IR3894 Simplified Block Diagram
3
AUGUST 08, 2012 | DATA SHEET | Rev 3.1
Datasheet pdf - http://www.DataSheet4U.co.kr/
PD‐97745
12A Highly Integrated SupIRBuck Single‐Input Voltage, Synchronous Buck Regulator - 4 -`
IR3894
PIN DESCRIPTIONS
PIN #
1
PIN NAME
Fb
PIN DESCRIPTION
Inverting input to the error amplifier. This pin is connected directly to the output of the regulator via resistor divider to set the output voltage and provide feedback to the error amplifier. Internal reference voltage , it can be used for margining operation also. In normal and sequencing mode operation, Vref is left floating. A 1nF ceramic capacitor is recommended between this pin and Gnd. In tracking mode operation, Vref should be tied to Gnd. Output of error amplifier. An external resistor and capacitor network is typically connected from this pin to Fb to provide loop compensation. Signal ground for internal reference and control circuitry. Multi‐function pin to set switching frequency. Use an external resistor from this pin to Gnd to set the free‐running switching frequency. An external clock signal to connect to this pin through a diode, the device’s switching frequency is synchronized with the external clock. Soft start/stop control. A high logic input enables the device to go into the internal soft start; a low logic input enables the output soft discharged. Pull this pin to Vcc if this function is not used. Power Good status pin. Output is open drain. Connect a pull up resistor from this pin to the voltage lower than or equal to the Vcc. Sense pin for over‐voltage protection and PGood. It is optional to tie this pin to Fb pin directly instead of using a resistor divider from Vout.
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2
Vref
3 4 5
Comp Gnd Rt/Sync
6 7 8 9 10 11 12 13 14 15 16 17
S_Ctrl PGood Vsns Vin Vcc/LDO_Out PGnd SW PVin Boot Enable Vp Gnd
Input voltage for Internal LDO. A 1.0µF capacitor should be connected between this pin and PGnd. If external supply is connected to Vcc/LDO_out pin, .