LPC3143

LPC3141/3143 Low-cost, low-power ARM926EJ microcontrollers with USB High-speed OTG, SD/MMC, and NAND flash controller Rev. 1 — 4 June 2012 Product data sheet 1. General description The NXP LPC3141/3143 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0 OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, four channel 10-bit A/D, and a myriad of serial and parallel interfaces in a single chip targeted at consumer, industrial, medical, and communication markets. To optimize system power consumption, the LPC3141/3143 have multiple power domains and a very flexible Clock Generation Unit (CGU) that provides dynamic clock gating and scaling. 2. Features and benefits 2.1 Key features  CPU platform  270 MHz, 32-bit ARM926EJ-S  16 kB D-cache and 16 kB I-cache  Memory Management Unit (MMU)  Internal memory  192 kB embedded SRAM  External memory interface  NAND flash controller with 8-bit ECC and AES decryption support (LPC3143 only)  8/16-bit Multi-Port Memory Controller (MPMC): SDRAM and SRAM  Security  AES decryption engine (LPC3143 only)  Secure one-time programmable memory for AES key storage and customer use  128 bit unique ID per device for DRM schemes  Communication and connectivity  High-speed USB 2.0 (OTG, Host, Device) with on-chip PHY  Two I2S interfaces  Integrated master/slave SPI  Two master/slave I2C-bus interfaces  Fast UART  Memory Card Interface (MCI): MMC/SD/SDIO/CE-ATA  Four-channel 10-bit ADC  Integrated 4/8/16-bi...