16 Inputs-outputs. TSSIO16E Datasheet
Van Peripheral Circuit - 16 Inputs-outputs
|Total Page||16 Pages|
VAN peripheral circuit - 16 inputs-outputs
q Management of 16 inputs-outputs (16-bit or two 8-bit configurable ports)
q VAN protocol V4.0
q 3 external wired address
q Safety mode in case of transmission loss
q Automatic adaptation to speed of bus from 8kTS/s to 250kTS/s
q CMOS 0,5µm, IO CMOS TTL compatible
q Internal power-on-reset
q Internal ring oscillator from 10 to 40MHz (for internal clock)
q 500kHz oscillator with external RC network (for safety mode clock usage)
q Supply voltage 5V±10%
q Typical power consomption 4mA
q SO28 package
2. General description / block diagram
The block diagram given below shows the organization of the circuit as two blocks: the VAN controller (block 1),
and the groups of specific functions (block 2) relative to the TSSIO16E. These are based on management of 16
inputs-outputs grouped together to form two 8-bit bi-directional programmable ports: port A and port B. The
circuit thus ensures double exchange of information with the VAN bus (via the line interface) on the one hand
and the active environment on the other.
Safety mode code
The bus data is supplied to the circuit (after shaping by the line transmitter/receiver) through 3 input lines RXD0,
RXD1 and RXD2 selected one after another when communication on one of the lines is defective (line diagnosis
system). Operation outside of the RXD0 line is referred to as in degrated mode. If perturbations persist in
reception the circuit switches to the safety mode (INT = 1) which, by default, ensures safety functions by activating
or inhibiting external circuitry. Two CONTROL and STATUS 8-bit registers, are used respectively for setting
operation to a given configuration, and for diagnosing the state of the circuit.
The write and read modes of ports A and B are determined by decoding the local address of the identifier field
in the VAN frame.
Rev. B - June. 07, 2000
datasheet pdf - http://www.DataSheet4U.net/
The behaviour of each port can be configured by three registers: DATA, DDR (Data Direction Register) and OPT
External address decoding by 3 pins produces 8 TSSIO16E circuits on the same bus.
3. Pinout / package
The pinout of the circuit is given below.
13, 14, 15, 16,
17, 18, 19, 20
22, 23, 24, 25,
26, 27, 28, 1
I/O Port A, 8 bi-directional bits, TTL compatible, Schmitt trigger
I/O Port B event type, 8 bi-directional bits, TTL compatible, Schmitt trigger
I/O Safety mode clock connection to ground or connection of a RC dipole for 500kHz oscillator.
In application, this input is tied to 1. In test mode, this input is tied to 0. TTL compatible
I External wired address - TTL compatible.
Receives output of comparator controlled by the Data signal from the interface circuit.
Receiving the output of the comparator driven by the Data_B signal of the interface
circuit. TTL compatible.
I Receives the comparator outputhttp://www.DataSheet4U.net/ driven by the differential (Data signal - Data_B).of the
interface circuit. TTL compatible.
O Interrupt. Used to generate an external active safety mode. TTL compatible.
O Drives the line interface circuit. TTL compatible.
External power supply.
The package is SO28 (Figure 2).
2 Rev. B - June. 07, 2000
datasheet pdf - http://www.DataSheet4U.net/
|Features||Datasheet pdf TSSIO16E VAN peripheral circuit - 16 inp uts-outputs 1. Features q q q q q q q q q q q q Management of 16 inputs-outpu ts (16-bit or two 8-bit configurable po rts) VAN protocol V4.0 3 external wired address Safety mode in case of transmi ssion loss Automatic adaptation to spee d of bus from 8kTS/s to 250kTS/s CMOS 0 ,5µm, IO CMOS TTL compatible Internal power-on-reset Internal ring oscillator from 10 to 40MHz (for internal clock) 500kHz oscillator with external RC netw ork (for safety mode clock usage) Suppl y voltage 5V±10% Typical power consomp tion 4mA SO28 package 2. General descr iption / block diagram The block diagra m given below shows the organization of the circuit as two blocks: the VAN con troller (block 1), and the groups of sp ecific functions (block 2) relative to the TSSIO16E. These are based on manage ment of 16 inputs-outputs grouped toget her to form two 8-bit bi-directional pr ogrammable ports: port A and port B. Th e circuit thus ensures double exchange of information with the VA.|
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