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FDS89161 Dataheets PDF



Part Number FDS89161
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Dual N-Channel MOSFET
Datasheet FDS89161 DatasheetFDS89161 Datasheet (PDF)

FDS89161 Dual N-Channel Shielded Gate PowerTrench® MOSFET September 2015 FDS89161 Dual N-Channel Shielded Gate PowerTrench® MOSFET 100 V, 2.7 A, 105 mΩ Features General Description „ Shielded Gate MOSFET Technology „ Max rDS(on) = 105 mΩ at VGS = 10 V, ID = 2.7 A „ Max rDS(on) = 171 mΩ at VGS = 6 V, ID = 2.1 A „ High performance trench technology for extremely low rDS(on) „ High power and current handling capability in a widely used surface mount package „ 100% UIL Tested „ RoHS Compliant .

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FDS89161 Dual N-Channel Shielded Gate PowerTrench® MOSFET September 2015 FDS89161 Dual N-Channel Shielded Gate PowerTrench® MOSFET 100 V, 2.7 A, 105 mΩ Features General Description „ Shielded Gate MOSFET Technology „ Max rDS(on) = 105 mΩ at VGS = 10 V, ID = 2.7 A „ Max rDS(on) = 171 mΩ at VGS = 6 V, ID = 2.1 A „ High performance trench technology for extremely low rDS(on) „ High power and current handling capability in a widely used surface mount package „ 100% UIL Tested „ RoHS Compliant This N-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench® process that incorporates Shielded Gate technology. This process has been optimized for rDS(on), switching performance and ruggedness. Applications „ Synchronous Rectifier „ Primary Switch For Bridge Topology D2 D2 D1 D1 Pin 1 G2 S2 G1 S1 SO-8 D2 5 D2 6 Q2 D1 7 Q1 D1 8 4 G2 3 S2 2 G1 1 S1 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS VGS ID EAS PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Single Pulse Avalanche Energy Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C Operating and Storage Junction Temperature Range Thermal Characteristics (Note 3) (Note1a) Ratings 100 ±20 2.7 15 13 31 1.6 -55 to +150 Units V V A mJ W °C RθJC RθJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient Package Marking and Ordering Information (Note 1) 40 (Note 1a) 78 °C/W Device Marking FDS89161 Device FDS89161 Package SO-8 Reel Size 13 ’’ Tape Width 12 mm Quantity 2500 units ©2011 Fairchild Semiconductor Corporation 1 FDS89161 Rev. 1.4 www.fairchildsemi.com FDS89161 Dual N-Channel Shielded Gate PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS ΔBVDSS ΔTJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250 μA, VGS = 0 V ID = 250 μA, referenced to 25 °C VDS = 80 V, VGS = 0 V VGS = ±20 V, VDS = 0 V 100 V 67 mV/°C 1 μA ±100 nA On Characteristics VGS(th) ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient rDS(on) Static Drain to Source On Resistance gFS Forward Transconductance VGS = VDS, ID = 250 μA 2 ID = 250 μA, referenced to 25 °C VGS = 10 V, ID = 2.7 A VGS = 6 V, ID = 2.1 A VGS = 10 V, ID = 2.7 A, TJ = 125 °C VDS = 10 V, ID = 2.7 A 3 4 V -9 mV/°C 86 105 120 171 mΩ 144 176 5 S Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 50 V, VGS = 0 V, f = 1MHz 158 210 pF 43 58 pF 3 5 pF 1 Ω Switching Characteristics td(on) tr td(off) tf Qg(TOT) Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Charge Gate to Drain “Miller” Charge VDD = 50 V, ID = 2.7 A, VGS = 10 V, RGEN = 6 Ω VGS = 0 V to 10 V VGS = 0 V to 5 V VDD = 50 V, ID = 2.7 A 4.2 10 ns 1.3 10 ns 7.3 15 ns 1.9 10 ns 3 4.1 nC 1.7 2.4 0.8 nC 0.8 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 2.7 A VGS = 0 V, IS = 2 A (Note 2) (Note 2) 0.85 1.3 V 0.82 1.2 trr Reverse Recovery Time Qrr Reverse Recovery Charge IF = 2.7 A, di/dt = 100 A/μs 34 54 ns 21 34 nC NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°C/W when mounted on a 1 in2 pad of 2 oz copper b) 135°C/W when mounted on a minimun pad 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25°C, L = 3 mH, IAS = 3 A, VDD = 100 V, VGS = 10 V. ©2011 Fairchild Semiconductor Corporation 2 FDS89161 Rev. 1.4 www.fairchildsemi.com FDS89161 Dual N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics ( N-Channel) TJ = 25°C unless otherwise noted ID, DRAIN CURRENT (A) 15 VGS = 10 V 12 VGS = 7 V 9 VGS = 6 V 6 VGS = 5.5 V 3 VGS = 5 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 4 VGS = 5 V VGS = 5.5 V 3 VGS = 6 V 2 1 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 3 6 9 ID, DRAIN CURRENT (A) VGS = 7 V VGS = 10 V 12 15 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 2.0 1.8 ID = 2.7 A VGS = 10 V 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -75 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) Figure 3. Normalized On-Resistance vs Junction Temperature rDS(on), DRAIN TO SOURCE ON-RE.


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