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HV7355 Dataheets PDF



Part Number HV7355
Manufacturers Supertex
Logo Supertex
Description Ultrasound Pulser
Datasheet HV7355 DatasheetHV7355 Datasheet (PDF)

Supertex inc. HV7355 Eight Channel, High Speed, Unipolar, Ultrasound Pulser 1.5A 150V Features ►► HVCMOS technology for high performance ►► High density integrated ultrasound transmitter ►► 0 to +150V output voltage ►► ±1.5A source and sink current (min.) ►► ±300mA current in CW mode ►► Up to 18MHz operating frequency ►► Matched delay times ►► Built-in gate driver floating voltage regulator ►► 2.5 to 3.3V CMOS logic interface Application ►► Portable medical ultrasound imaging ►► Piezoelectric.

  HV7355   HV7355


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Supertex inc. HV7355 Eight Channel, High Speed, Unipolar, Ultrasound Pulser 1.5A 150V Features ►► HVCMOS technology for high performance ►► High density integrated ultrasound transmitter ►► 0 to +150V output voltage ►► ±1.5A source and sink current (min.) ►► ±300mA current in CW mode ►► Up to 18MHz operating frequency ►► Matched delay times ►► Built-in gate driver floating voltage regulator ►► 2.5 to 3.3V CMOS logic interface Application ►► Portable medical ultrasound imaging ►► Piezoelectric transducer drivers ►► NDT ultrasound transmission ►► Pulse waveform generator General Description The Supertex HV7355 is an eight-channel, unipolar, high voltage, high-speed pulse generator. It is designed for medical ultrasound applications. This high voltage and high speed integrated circuit can also be used for other piezoelectric, capacitive or MEMS sensors in ultrasonic nondestructive detection and sonar ranger applications. The HV7355 consists of a controller logic interface circuit, level translators, MOSFET gate drivers and high current P-channel and N-channel MOSFETs as the output stage for each channel. The output stages of each channel are designed to provide peak output currents over ±1.5A for pulsing, when MC = 1, with up to 150V swings. When MC = 0, all the output stages drop the peak current to ±500mA for low-voltage CW mode operation to save power. This direct coupling topology of the gate driver not only saves one high voltage capacitor per channel, but also makes the PCB layout easier. Typical Application Circuit +3.3V +5.0V +5.0 to 150V +3.3V Logic VLL AVDD EN PWR MC CWD IN0 Q0 VDD CPF VSS VDD LR VPP LT VDD VPF VDD LT IN7 SET LE CS SCK Q[7:0] Q7 Data Latch VDD LT VDD LT VPP VPF VDD Shift Reg. SUB Q7 D0 SDO SDI VSUB GND VSS VPP VPF TX0 RGND VPP TX7 RGND RGND -5.0V Doc.# DSFP-HV7355 D011314 X0 X7 Supertex inc. www.supertex.com HV7355 Ordering Information Part Number Package Options Packing HV7355K6-G 56-Lead QFN (8x8) 250/Tray HV7355K6-G M937 56-Lead QFN (8x8) -G denotes a lead (Pb)-free / RoHS compliant package 2000/Reel Absolute Maximum Ratings Parameter Value GND, RGND and VSUB VLL, Positive logic supply VDD, Positive logic and level translator supply VSS, Negative level translator and LR supply VPP, High voltage positive supply ( VPP -VTXx) Voltage (VTXx - RGND) Voltage All logic input PINX, NINX and EN voltages Operating temperature 0V -0.5V to +7.0V -0.5V to +7.0V +0.5V to -7.0V -0.5V to +160V -0.5V to +160V -0.5V to +160V -0.5V to +7.0V -40°C to 125°C Storage temperature -65°C to 150°C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Package 56-Lead QFN θja 21OC/W ESD Sensitive Device Pin Configuration 56 1 56-Lead QFN (top view) Package Marking HV7355K6 LLLLLLLLL YYWW AAA CCC L = Lot Number YY = Year Sealed WW = Week Sealed A = Assembler ID C = Country of Origin = “Green” Packaging Package may or may not include the following marks: Si or 56-Lead QFN Power-Up Sequence Power-Down Sequence Step Description Step Description 1 VSS 1 EN & logic signal low 2 VLL with logic signal low 3 VPP 3 VDD 4 VDD 4 VPP 5 VLL 5 EN & logic signal go to high 6 VSS Note: Powering up/down in any arbitrary sequence will not cause any damage to the device. The powering up/down sequence is only recommended in order to minimize possible inrush current. Truth Table (MC = X) Drive Mode Control Table Logic Inputs EN Q[7:0] IN0~7 1 1111,1111 0 1 1111,1111 1 10X 0XX Output TX0~7 GND VPP GND HiZ MC ISC (A) RonP RonN 0 0.50 18 13 1 1.6 8.0 3.0 Note: VPP = +150V, VDD = +5.0 V, VLL = +3.3V, VSS = -5.0V, VSUB = 0V Doc.# DSFP-HV7355 D011314 Supertex inc. 2 www.supertex.com HV7355 Operating Supply Voltages and Current (Eight Active Channels) (Operating conditions, unless otherwise specified, VLL = +3.3V, VADD = VDD = +5.0V, VSS = -5.0V ,VPP = +150V, TA = 25°C) Sym Parameter Min Typ Max Units Conditions VLL VDD VPP VSS VPF ILL IDDQ IDDEN IDDEN IDDENCW ISSQ ISSEN ISSEN ISSENCW IPPQ IPPEN IPPEN IPPENCW Logic voltage reference Internal voltage supply Positive gate driver supply Negative low voltage supply Gate driver floating voltage VLL Current EN = Low VDD Current EN = Low VDD Current EN = High VDD Current MC = High VDD Current MC = Low VSS Current EN = Low VSS Current EN = High VSS Current MC = High VSS Current MC = Low VPP Current EN = Low VPP Current EN = High VPP Current MC = High VPP Current MC = Low 2.37 3.30 3.47 V --- 4.5 5.0 5.5 V --- VDD - +150 V --- -5.5 -5.0 -4.5 V --- - 5.0 - V --- - 2.0 10 μA --- - 50 150 μA f = 0MHz - 1.0 4.0 mA f = 0MHz - 160 - mA f = 5.0MHz, continuous - 12 - mA no loads - 5.0 20 μA --- - 1.0 4.0 mA f = 0MHz - 95 .


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