ATA5724

Features Frequency Receiving Range of (3 Versions) – f0 = 312.5 MHz to 317.5 MHz or – f0 = 431.5 MHz to 436.5 MHz or – f0 = 868 MHz to 870 MHz 30 dB Image Rejection Receiving Bandwidth – BIF = 300 kHz for 315 MHz/433 MHz Version – BIF = 600 kHz for 868 MHz Version Fully Integrated LC-VCO and PLL Loop Filter Very High Sensitivity with Power Matched LNA – ATA5723/ATA5724: –107 dBm, FSK, BR_0 (1.0 kBit/s to 1.8 kBit/s), Manchester, BER 10E-3 –113 dBm, ASK, BR_0 (1.0 kBit/s to 1.8 kBit/s), Manchester, BER 10E-3 – ATA5728: –105 dBm, FSK, BR_0 (1.0 kBit/s to 1.8 kBit/s), Manchester, BER 10E-3 –111 dBm, ASK, BR_0 (1.0 kBit/s to 1.8 kBit/s), Manchester, BER 10E-3 High System IIP3 – –18 dBm at 868 MHz – –23 dBm at 433 MHz – –24 dBm at 315 MHz System 1-dB Compression Point – –27.7 dBm at 868 MHz – –32.7 dBm at 433 MHz – –33.7 dBm at 315 MHz High Large-signal Capability at GSM Band (Blocking –33 dBm at +10 MHz, IIP3 = –24 dBm at +20 MHz) Logarithmic RSSI Output XTO Start-up with Negative Resistor of 1.5 kΩ 5V to 20V Automotive Compatible Data Interface Data Clock Available for Manchester and Bi-phase-coded Signals Programmable Digital Noise Suppression Low Power Consumption Due to Configurable Polling Temperature Range –40°C to +105°C ESD Protection 2 kV HBM, All Pins Communication to Microcontroller Possible using a Single Bi-directional Data Line Low-cost Solution Due to High Integration Level with Minimum External Circuitry Requirements Supply Voltage Range 4.5V to 5.5V ...