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HMT351U7EFR8A Dataheets PDF



Part Number HMT351U7EFR8A
Manufacturers Hynix Semiconductor
Logo Hynix Semiconductor
Description DDR3L SDRAM
Datasheet HMT351U7EFR8A DatasheetHMT351U7EFR8A Datasheet (PDF)

240pin DDR3L SDRAM Unbuffered DIMM DDR3L SDRAM Unbuffered DIMMs Based on 2Gb E-Die HMT325U7EFR8A HMT351U7EFR8A *SK hynix reserves the right to change products or specifications without notice. Rev. 1.3 / Jul. 2013 1 Free Datasheet http://www.datasheet4u.com/ Revision History Revision No. 1.0 1.1 1.2 1.3 History Initial Release Module Dimension Updated IDD5B spec modified Changed module maximum thickness to reflect the measured maximum Draft Date Jun. 2012 Jul. 2012 Nov. 2012 Jul. 2013 Rema.

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240pin DDR3L SDRAM Unbuffered DIMM DDR3L SDRAM Unbuffered DIMMs Based on 2Gb E-Die HMT325U7EFR8A HMT351U7EFR8A *SK hynix reserves the right to change products or specifications without notice. Rev. 1.3 / Jul. 2013 1 Free Datasheet http://www.datasheet4u.com/ Revision History Revision No. 1.0 1.1 1.2 1.3 History Initial Release Module Dimension Updated IDD5B spec modified Changed module maximum thickness to reflect the measured maximum Draft Date Jun. 2012 Jul. 2012 Nov. 2012 Jul. 2013 Remark Rev. 1.3 / Jul. 2013 2 Free Datasheet http://www.datasheet4u.com/ Description SK hynix Unbuffered DDR3L SDRAM DIMMs (Unbuffered Double Data Rate Synchronous DRAM Dual InLine Memory Modules) are low power, high-speed operation memory modules that use DDR3L SDRAM devices. These Unbuffered SDRAM DIMMs are intended for use as main memory when installed in systems such as PCs and workstations.  Feature • Power Supply: VDD=1.35V (1.283V to 1.45V) • VDDQ=1.35V (1.283 to 1.45V) • VDDSPD=3.0V to 3.6V • Backward Compatible with 1.5V DDR3 Memory module • 8 internal banks • Data transfer rates: PC3-12800,PC3-10600 • Bi-directional Differential Data Strobe • 8 bit pre-fetch • Burst Length (BL) switch on-the-fly: BL 8 or BC (Burst Chop) 4 • Supports ECC error correction and detection • On Die Termination (ODT) supported • Temperature sensor with integrated SPD (Serial Presence Detect) EEPROM • This product is in Compliance with the RoHS directive  Ordering Information Part Number HMT325U7EFR8A-H9/PB HMT351U7EFR8A-H9/PB Density 2GB 4GB Organization 256Mx72 512Mx72 Component Composition 256Mx8(H5TC2G83EFR)*9 256Mx8(H5TC2G83EFR)*18 # of ranks 1 2 FDHS X X Rev. 1.3 / Jul. 2013 3 Free Datasheet http://www.datasheet4u.com/ Key Parameters MT/s DDR3L-1066 DDR3L-1333 DDR3L-1600 Grade -G7 -H9 -PB tCK (ns) 1.875 1.5 1.25 CAS Latency (tCK) 7 9 11 tRCD (ns) 13.125 tRP (ns) 13.125 tRAS (ns) 37.5 36 35 tRC (ns) 50.625 49.5 (49.125)* 48.75 (48.125)* CL-tRCD-tRP 7-7-7 9-9-9 11-11-11 13.5 13.5 (13.125)* (13.125)* 13.75 13.75 (13.125)* (13.125)* *SK hynix DRAM devices support optional downbinning to CL11, CL9 and CL7. SPD setting is programmed to match. Speed Grade Frequency [MHz] Grade CL6 -G7 -H9 -PB 800 800 800 CL7 1066 1066 1066 CL8 1066 1066 1066 1333 1333 1333 1333 1600 CL9 CL10 CL11 Remark Address Table 2GB(1Rx8) Refresh Method Row Address Column Address Bank Address Page Size 8K/64ms A0-A14 A0-A9 BA0-BA2 1KB 4GB(2Rx8) 8K/64ms A0-A14 A0-A9 BA0-BA2 1KB Rev. 1.3 / Jul. 2013 4 Free Datasheet http://www.datasheet4u.com/ Pin Descriptions Pin Name A0–A15 BA0–BA2 RAS CAS WE S0–S1 CKE0–CKE1 ODT0–ODT1 DQ0–DQ63 CB0–CB7 DQS0–DQS8 DQS0–DQS8 DM0–DM8 CK0–CK1 CK0–CK1 Description SDRAM address bus SDRAM bank select SDRAM row address strobe SDRAM column address strobe SDRAM write enable DIMM Rank Select Lines SDRAM clock enable lines On-die termination control lines DIMM memory data bus DIMM ECC check bits SDRAM data strobes (positive line of differential pair) SDRAM data st.


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