N-Channel MOSFET. FDP12N50 Datasheet

FDP12N50 Datasheet PDF, Equivalent


Part Number

FDP12N50

Description

N-Channel MOSFET

Manufacture

Fairchild Semiconductor

Total Page 11 Pages
PDF Download
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FDP12N50 Datasheet
FDP12N50 / FDPF12N50T
N-Channel UniFETTM MOSFET
500 V, 11.5 A, 650 mΩ
Features
• RDS(on) = 550 mΩ (Typ.) @ VGS = 10 V, ID = 6 A
• Low Gate Charge (Typ. 22 nC)
• Low Crss (Typ. 11 pF)
• 100% Avalanche Tested
• RoHS Compliant
Applications
• LCD/LED/PDP TV
• Lighting
• Uninterruptible Power Supply
November 2013
Description
UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
This MOSFET is tailored to reduce on-state resistance, and to
provide better switching performance and higher avalanche
energy strength. This device family is suitable for switching
power converter applications such as power factor correction
(PFC), flat panel display (FPD) TV power, ATX and electronic
lamp ballasts.
D
GDS
TO-220
G
GDS TO-220F
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
Parameter
VDSS
VGSS
ID
IDM
EAS
IAR
EAR
dv/dt
PD
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25oC)
- Continuous (TC = 100oC)
- Pulsed
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(TC = 25oC)
- Derate Above 25oC
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
TJ, TSTG
Operating and Storage Temperature Range
TL Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds
*Drain current limited by maximum junction temperature
S
FDP12N50 FDPF12N50T
500
±30
11.5 11.5 *
6.9 6.9 *
46 46 *
456
11.5
16.7
4.5
165 42
1.33 0.3
-55 to +150
300
Unit
V
V
A
A
mJ
A
mJ
V/ns
W
W/oC
oC
oC
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
FDP12N50
0.75
62.5
FDPF12N50T Unit
3.0
62.5
oC/W
©2012 Fairchild Semiconductor Corporation
FDP12N50 / FDPF12N50T Rev. C1
1
www.fairchildsemi.com

FDP12N50 Datasheet
Package Marking and Ordering Information
Part Number
FDP12N50
FDPF12N50T
Top Mark
FDP12N50
FDPF12N50T
Package
TO-220
TO-220F
Packing Method
Tube
Tube
Reel Size
N/A
N/A
Tape Width
N/A
N/A
Electrical Characteristics TC = 25oC unless otherwise noted.
Symbol
Parameter
Test Conditions
Off Characteristics
BVDSS
ΔBVDSS
/ ΔTJ
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
IDSS Zero Gate Voltage Drain Current
IGSS
Gate to Body Leakage Current
ID = 250 μA, VGS = 0 V, TJ = 25oC
ID = 250 μA, Referenced to 25oC
VDS = 500 V, VGS = 0 V
VDS = 400 V, TC = 125oC
VGS = ±30 V, VDS = 0 V
On Characteristics
VGS(th)
RDS(on)
gFS
Gate Threshold Voltage
Static Drain to Source On Resistance
Forward Transconductance
VGS = VDS, ID = 250 μA
VGS = 10 V, ID = 6 A
VDS = 40 V, ID = 6 A
Dynamic Characteristics
Ciss
Coss
Crss
Qg
Qgs
Qgd
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VDS = 25 V, VGS = 0 V,
f = 1 MHz
VDS = 400 V, ID = 11.5 A,
VGS = 10 V
(Note 4)
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
VDD = 250 V, ID = 11.5 A,
VGS = 10 V, RG = 25 Ω
(Note 4)
Drain-Source Diode Characteristics
IS Maximum Continuous Drain to Source Diode Forward Current
ISM Maximum Pulsed Drain to Source Diode Forward Current
VSD
Drain to Source Diode Forward Voltage
VGS = 0 V, ISD = 11.5 A
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, ISD = 11.5 A,
dIF/dt = 100 A/μs
Notes:
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. L = 6.9 mH, IAS = 11.5 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3. ISD 11.5 A, di/dt 200 A/μs, VDD BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature typical characteristics.
Min.
500
-
-
-
-
3.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ.
-
0.5
-
-
-
-
0.55
11.5
985
140
11
22
6
9
24
50
45
30
-
-
-
375
3.5
Quantity
50 units
50 units
Max. Unit
-
-
1
10
±100
V
V/oC
μA
nA
5.0 V
0.65 Ω
-S
1315
190
17
30
-
-
pF
pF
pF
nC
nC
nC
60 ns
110 ns
100 ns
70 ns
11.5 A
46 A
1.4 V
- ns
- μC
©2012 Fairchild Semiconductor Corporation
FDP12N50 / FDPF12N50T Rev. C1
2
www.fairchildsemi.com


Features Datasheet pdf FDP12N50 / FDPF12N50 N-Channel MOSFET J une 2007 FDP12N50 / FDPF12N50 N-Channe l MOSFET 500V, 11.5A, 0.65Ω Features RDS(on) = 0.55Ω (Typ.)@ VGS = 10V, ID = 6A • Low gate charge ( Typ. 22nC ) • Low Crss ( Typ. 11pF) • Fast sw itching • 100% avalanche tested • I mproved dv/dt capability • RoHS compl iant UniFETTM tm Description These N- Channel enhancement mode power field ef fect transistors are produced using Fai rchild’s proprietary, planar stripe, DMOS technology. This advanced technolo gy has been especially tailored to mini mize on-state resistance, provide super ior switching performance, and withstan d high energy pulse in the avalanche an d commutation mode. These devices are w ell suited for high efficient switched mode power supplies and active power fa ctor correction. D G DS TO-220 FDP S eries GD S TO-220F FDPF Series G S MOSFET Maximum Ratings TC = 25oC unles s otherwise noted* Symbol VDSS VGSS ID IDM EAS IAR EAR dv/dt PD TJ, TSTG TL Parameter Drain to Source Voltage Gate to So.
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