128Mb Mobile Synchronous DRAM
IS42SM81600E / IS42SM16800E / IS42SM32400E IS42RM81600E / IS42RM16800E / IS42RM32400E
16Mx8, 8Mx16, 4Mx32 128Mb Mobile S...
Description
IS42SM81600E / IS42SM16800E / IS42SM32400E IS42RM81600E / IS42RM16800E / IS42RM32400E
16Mx8, 8Mx16, 4Mx32 128Mb Mobile Synchronous DRAM
FEATURES
Fully synchronous; all signals referenced to a positive clock edge Internal bank for hiding row access and precharge Programmable CAS latency: 2, 3 Programmable Burst Length: 1, 2, 4, 8, and Full Page Programmable Burst Sequence: Sequential and Interleave Auto Refresh (CBR) TCSR (Temperature Compensated Self Refresh) PASR (Partial Arrays Self Refresh): 1/16, 1/8, 1/4, 1/2, and Full Deep Power Down Mode (DPD) Driver Strength Control (DS): 1/4, 1/2, and Full
APRIL 2011 DESCRIPTION
ISSI's 128Mb Mobile Synchronous DRAM achieves highspeed data transfer using pipeline architecture. All input and output signals refer to the rising edge of the clock input. Both write and read accesses to the SDRAM are burst oriented. The 128Mb Mobile Synchronous DRAM is designed to minimize current consumption making it ideal for low-power applications. Both TSOP and BGA packages are offered, including industrial grade products.
KEY TIMING PARAMETERS
Parameter CLK Cycle Time CAS Latency = 3 CAS Latency = 2 CLK Frequency CAS Latency = 3 CAS Latency = 2 Access Time from CLK CAS Latency = 3 CAS Latency = 2 5.4 8 5.4 8 166 100 143 100 6 10 7 10 -6 -7 -75E Unit ns ns Mhz Mhz ns ns
–
7.5
OPTIONS
Configurations: - 16M x 8 - 8M x 16 - 4M x 32 Power Supply IS42SMxxx – Vdd/Vddq = 3.3 V IS42RMxxx – Vdd/Vddq = 2.5 ...
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