Document
STD150N3LLH6 STP150N3LLH6, STU150N3LLH6
N-channel 30 V, 0.0024 Ω , 80 A, DPAK, IPAK, TO-220 STripFET™ VI DeepGATE™ Power MOSFET
Features
Type STD150N3LLH6 STP150N3LLH6 STu150N3LLH6
■ ■ ■ ■
VDSS 30 V 30 V 30 V
RDS(on) max 0.0028 Ω 0.0033 Ω 0.0033 Ω
ID 80 A 80 A 80 A
3 1
3 2 1
DPAK
IPAK
RDS(on) * Qg industry benchmark Extremely low on-resistance RDS(on) High avalanche ruggedness Low gate drive power losses
1 2 3
TO-220
Application
■
Switching applications
Figure 1.
Internal schematic diagram
$ 4!" OR
Description
This product utilizes the 6th generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure.The resulting Power MOSFET exhibits the lowest RDS(on) in all packages.
'
3
!-V
Table 1.
Device summary
Marking 150N3LLH6 150N3LLH6 150N3LLH6 Package DPAK TO-220 IPAK Packaging Tape and reel Tube Tube
Order codes STD150N3LLH6 STP150N3LLH6 STU150N3LLH6
September 2009
Doc ID 15227 Rev 3
1/16
www.st.com 16
Free Datasheet http://www.datasheet4u.com/
Contents
STD150N3LLH6, STP150N3LLH6, STU150N3LLH6
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ......................... 6
3 4 5 6
Test circuit
............................................... 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16
Doc ID 15227 Rev 3
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STD150N3LLH6, STP150N3LLH6, STU150N3LLH6
Electrical ratings
1
Electrical ratings
Table 2.
Symbol VDS VGS ID (1) ID IDM (2) PTOT
Absolute maximum ratings
Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC = 25 °C Drain current (continuous) at TC = 100 °C Drain current (pulsed) Total dissipation at TC = 25 °C Derating factor Value 30 ± 20 80 80 320 110 0.73 525 -55 to 175 175 Unit V V A A A W W/°C mJ °C °C
EAS (3) Tstg Tj
Single pulse avalanche energy Storage temperature Max. operating junction temperature
1. Limited by wire bonding 2. Pulse width limited by safe operating area 3. Starting Tj = 25°C, ID = 40 A, VDD = 25 V
Table 3.
Symbol Rthj-case Rthj-amb Tj
Thermal resistance
Parameter Thermal resistance junction-case max Thermal resistance junction-case max Maximum lead temperature for soldering purpose Value 1.36 100 275 Unit °C/W °C/W °C
Doc ID 15227 Rev 3
3/16
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Electrical characteristics
STD150N3LLH6, STP150N3LLH6, STU150N3LLH6
2
Electrical characteristics
(TCASE = 25 °C unless otherwise specified) Table 4.
Symbol V(BR)DSS IDSS IGSS VGS(th)
Static
Parameter Drain-source breakdown Voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Test conditions ID = 250 µA, VGS= 0 VDS = 30 V VDS = 30 V,Tc = 125 °C VGS = ± 20 V VDS = VGS, ID = 250 µA VGS = 10 V, ID = 40 A SMD version VGS = 10 V, ID = 40 A VGS = 4.5 V, ID = 40 A SMD version VGS = 4.5 V, ID = 40 A 1 Min. 30 1 10
±100
Typ.
Max.
Unit V µA µA nA V Ω Ω Ω Ω
2.5 0.0024 0.0028 0.0029 0.0033 0.0034 0.0045 0.0039 0.0049
RDS(on)
Static drain-source on resistance
Table 5.
Symbol Ciss Coss Crss Qg Qgs Qgd
Dynamic
Parameter Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS = 25 V, f=1 MHz, VGS = 0 VDD = 15 V, ID = 80 A VGS = 4.5 V (see Figure 14) f = 1 MHz gate bias Bias = 0 test signal level = 20 mV open drain Min Typ. 4040 740 425 40 16.3 15.8 Max. Unit pF pF pF nC nC nC
-
-
-
RG
Gate input resistance
-
1.4
-
Ω
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STD150N3LLH6, STP150N3LLH6, STU150N3LLH6
Electrical characteristics
Table 6.
Symbol td(on) tr td(off) tf
Switching on/off (inductive load)
Parameter Turn-on delay time Rise time Test conditions VDD = 15 V, ID = 40 A, RG = 4.7 Ω, VGS = 10 V (see Figure 15) VDD = 15 V, ID = 40 A, RG = 4.7 Ω, VGS = 10 V (see Figure 15) Min. Typ. 17 18 Max. Unit ns ns
-
Turn-off delay time Fall time
75 46
-
ns ns
Table 7.
Symbol ISD ISDM(1) VSD(2) trr Qrr IRRM
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 40 A, VGS = 0 ISD = 80 A, di/dt = 100 A/µs, VDD = 24 V (see Figure 17) Test conditions Min. 34 35 2.1 Typ. Max. 80 320 1.1 Unit A A V ns nC A
1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Doc ID 15227 Rev 3
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Electrical c.