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IC61SF12832 Datasheet PDF

Part Number IC61SF12832
Description (IC61SF12832 / IC61SF12836) 128K x 32 Flow Through SyncBurst SRAM
Manufacture Integrated Circuit Solution
Total Page 17 Pages
PDF Download Download IC61SF12832 Datasheet PDF

Features: Datasheet pdf IC61SF12832 IC61SF12836 Document Title 1 28K x 32 Flow Through SyncBurst SRAM R evision History Revision No 0A History Initial Draft Draft Date Remark Sep tember 17,2001 The attached datasheets are provided by ICSI. Integrated Circu it Solution Inc reserve the right to ch ange the specifications and products. I CSI will answer to your questions about device. If you have any questions, ple ase contact the ICSI offices. Integrat ed Circuit Solution Inc. SSR018-0A 09/1 7/2001 1 Free Datasheet http://www.dat asheet4u.com/ IC61SF12832 IC61SF12836 128K x 32, 128K x 36 SYNCHRONOUS FLOW- THROUGH STATIC RAM FEATURES • Fast ac cess times: 7.5 ns, 8 ns, 8.5 ns, 10 ns , and 12 ns • Internal self-timed wri te cycle • Individual Byte Write Cont rol and Global Write • Clock controll ed, registered address, data inputs and control signals • PentiumTM or linea r burst sequence control using MODE inp ut • Three chip enables for simple de pth expansion and address pipelining • Common data inputs and data outputs .

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IC61SF12832 datasheet
IC61SF12832
IC61SF12836
Document Title
128K x 32 Flow Through SyncBurst SRAM
Revision History
Revision No
0A
History
Initial Draft
Draft Date
Remark
September 17,2001
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
SSR018-0A 09/17/2001
1
Free Datasheet http://www.datasheet4u.com/

IC61SF12832 datasheet
IC61SF12832
IC61SF12836
128K x 32, 128K x 36 SYNCHRONOUS
FLOW-THROUGH STATIC RAM
FEATURES
• Fast access times: 7.5 ns, 8 ns, 8.5 ns, 10 ns,
and 12 ns
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data
inputs and control signals
• PentiumTM or linear burst sequence control
using MODE input
• Three chip enables for simple depth expansion
and address pipelining
• Common data inputs and data outputs
• 100-Pin TQFP (JEDEC LQFP) and
119-pin PBGA package
• Single +3.3V +10%, -5% power supply
• Power-down snooze mode
DESCRIPTION
The ICSI IC61SF12832 and IC61SF12836 are high-speed
synchronous static RAM designed to provide a burstable, high-
performance for high speed networking and communication
applications. It is organized as 131,072 words by 32 bits or 36
bits, fabricated with ICSI's advanced CMOS technology. The
device integrates a 2-bit burst counter, high-speed SRAM
core, and high-drive capability outputs into a single monolithic
circuit. All synchronous inputs pass through registers controlled
by a positive-edge-triggered single clock input.
Write cycles are internally self-timed and are initiated by the
rising edge of the clock input. Write cycles can be from one to
four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
BW1 controls DQa, BW2 controls DQb, BW3 controls DQc,
BW4 controls DQd, conditioned by BWE being LOW. A LOW
on GW input would cause all bytes to be written.
Bursts can be initiated with either ADSP (Address Status
Processor) or ADSC (Address Status Cache Controller) input
pins. Subsequent burst addresses can be generated internally
by the IC61SF12832 and controlled by the ADV (burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW. Interleave
burst is achieved when this pin is tied HIGH or left floating.
FAST ACCESS TIME
Symbol
tKQ
tKC
Parameter
Clock Access Time
Cycle Time
Frenquency
7.5 8 8.5 10 12
7.5 8 8.5 10 12
8.5 10 11 15 15
117 100 90 66 66
Units
ns
ns
MHz
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2 Integrated Circuit Solution Inc.
SSR018-0A 09/17/2001
Free Datasheet http://www.datasheet4u.com/





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