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MT29F2G08ABBEAH4

Micron

2Gb NAND Flash Memory

Micron Confidential and Proprietary 2Gb: x8, x16 NAND Flash Memory Features NAND Flash Memory MT29F2G08ABAEAH4, MT29F2...


Micron

MT29F2G08ABBEAH4

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Micron Confidential and Proprietary 2Gb: x8, x16 NAND Flash Memory Features NAND Flash Memory MT29F2G08ABAEAH4, MT29F2G08ABAEAWP, MT29F2G08ABBEAH4 MT29F2G08ABBEAHC, MT29F2G16ABAEAWP, MT29F2G16ABBEAH4 MT29F2G16ABBEAHC Features Open NAND Flash Interface (ONFI) 1.0-compliant1 Single-level cell (SLC) technology Organization – Page size x8: 2112 bytes (2048 + 64 bytes) – Page size x16: 1056 words (1024 + 32 words) – Block size: 64 pages (128K + 4K bytes) – Plane size: 2 planes x 1024 blocks per plane – Device size: 2Gb: 2048 blocks Asynchronous I/O performance – tRC/tWC: 20ns (3.3V), 25ns (1.8V) Array performance – Read page: 25µs 3 – Program page: 200µs (TYP: 1.8V, 3.3V)3 – Erase block: 700µs (TYP) Command set: ONFI NAND Flash Protocol Advanced command set – Program page cache mode4 – Read page cache mode 4 – One-time programmable (OTP) mode – Two-plane commands 4 – Interleaved die (LUN) operations – Read unique ID – Block lock (1.8V only) – Internal data move Operation status byte provides software method for detecting – Operation completion – Pass/fail condition – Write-protect status Ready/Busy# (R/B#) signal provides a hardware method of detecting operation completion WP# signal: Write protect entire device First block (block address 00h) is valid when shipped from factory with ECC. For minimum required ECC, see Error Management. Block 0 requires 1-bit ECC if PROGRAM/ERASE cycles are less than 1000 RESET (FFh) required as first command after powero...




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