Document
NVMFD5852NL
Power MOSFET
40 V, 6.9 mW, 44 A, Dual N−Channel Logic Level, Dual SO−8FL
Features
• Small Footprint (5x6 mm) for Compact Designs • Low RDS(on) to Minimize Conduction Losses • Low Capacitance to Minimize Driver Losses • NVMFD5852NLWF − Wettable Flanks Option for Enhanced Optical
Inspection
• AEC−Q101 Qualified and PPAP Capable • This is a Pb−Free Device
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
VDSS
40
V
Gate−to−Source Voltage
VGS
"20 V
Continuous Drain Cur-
Tmb = 25°C
ID
rent RYJ−mb (Notes 1, 2, 3, 4)
Steady Tmb = 100°C
Power Dissipation
State Tmb = 25°C
PD
RYJ−mb (Notes 1, 2, 3)
Tmb = 100°C
44
A
31
27
W
13
Continuous Drain Cur-
TA = 25°C
ID
rent RqJA (Notes 1, 3 & 4)
Steady TA = 100°C
Power Dissipation RqJA (Notes 1 & 3)
State
TA = 25°C
PD
TA = 100°C
15
A
10.6
3.2
W
1.6
Pulsed Drain Current TA = 25°C, tp = 10 ms
IDM
329
A
Operating Junction and Storage Temperature
TJ, Tstg − 55 to °C 175
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VGS = 10 V, IL(pk) = 40 A, L = 0.1 mH, RG = 25 W)
Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)
IS
40
A
EAS
80
mJ
TL
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol Value Unit
Junction−to−Mounting Board (top) − Steady State (Notes 2, 3)
RYJ−mb
5.6 °C/W
Junction−to−Ambient − Steady State (Note 3)
RqJA
47
1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 4. Maximum current for pulses as long as 1 second are higher but are dependent
on pulse duration and duty cycle.
http://onsemi.com
V(BR)DSS 40 V
RDS(on) MAX 6.9 mW @ 10 V 12.0 mW @ 4.5 V
ID MAX 44 A
Dual N−Channel
D1
D2
G1
G2
S1
S2
MARKING DIAGRAM
1
DFN8 5x6 (SO8FL) CASE 506BT
D1 D1
S1
D1
G1 5852xx D1
S2 AYWZZ D2
G2
D2
D2 D2
5852NL = Specific Device Code
for NVMFD5852NL
5852LW = Specific Device Code
for NVMFD5852NLWF
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
ORDERING INFORMATION
Device
Package Shipping†
NVMFD5852NLT1G
DFN8 1500 / Tape &
(Pb−Free)
Reel
NVMFD5852NLWFT1G DFN8 1500 / Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2014
1
September, 2014 − Rev. 6
Publication Order Number: NVMFD5852NL/D
NVMFD5852NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS
VGS = 0 V, ID = 250 mA
40
Drain−to−Source Breakdown Voltage V(BR)DSS/TJ Temperature Coefficient
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current ON CHARACTERISTICS (Note 5)
IDSS IGSS
VGS = 0 V, VDS = 40 V
TJ = 25°C TJ = 125°C
VDS = 0 V, VGS = ±20 V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250 mA
1.4
Negative Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
Forward Transconductance CHARGES AND CAPACITANCES
RDS(on) gFS
VGS = 10 V, ID = 20 A VGS = 4.5 V, ID = 20 A
VDS = 5 V, ID = 5 A
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge Total Gate Charge
QGD QG(TOT)
SWITCHING CHARACTERISTICS (Note 6)
VGS = 0 V, f = 1.0 MHz, VDS = 25 V
VGS = 4.5 V, VDS = 32 V, ID = 20 A
VGS = 10 V, VDS = 32V, ID = 20 A
Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time
td(on) tr
td(off) tf
td(on) tr
td(off) tf
VGS = 4.5 V, VDS = 32 V, ID = 20 A, RG = 2.5 W
VGS = 10 V, VDS = 32 V, ID = 20 A, RG = 2.5 W
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge
VSD
tRR ta tb QRR
VGS = 0 V, IS = 20 A
TJ = 25°C TJ = 125°C
VGS = 0 V, dIS/dt = 100 A/ms, IS = 20 A
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures.
Typ
Max
Unit
V
37.3
mV/°C
1.0
mA
100
±100
nA
2.4
V
6.3
mV/°C
5.3
6.9
mW
8.7
12
24
S
1800
pF
2.