Document
FDMF6707V — Extra-Small High-Performance, High-Frequency DrMOS Module
June 2012
FDMF6707V — Extra-Small, High-Performance, High-Frequency DrMOS Module
Benefits
Ultra-Compact 6x6mm PQFN, 72% Space-Saving Compared to Conventional Discrete Solutions Fully Optimized System Efficiency Clean Switching Waveforms with Minimal Ringing High-Current Handling
Description
The XS™ DrMOS family is Fairchild’s next-generation, fully optimized, ultra-compact, integrated MOSFET plus driver power stage solution for high-current, highfrequency, synchronous buck DC-DC applications. The FDMF6707V integrates a driver IC, two power MOSFETs, and a bootstrap Schottky diode into a thermally enhanced, ultra-compact 6x6mm PQFN package. With an integrated approach, the complete switching power stage is optimized for driver and MOSFET dynamic performance, system inductance, and power MOSFET RDS(ON). XS™ DrMOS uses Fairchild's highperformance PowerTrench® MOSFET technology, which dramatically reduces switch ringing, eliminating the snubber circuit in most buck converter applications. A new driver IC, with reduced dead times and propagation delays, further enhances performance. An internal 12V to 5V linear regulator enables the FDMF6707V to operate from a single 12V supply. A thermal warning function warns of potential overtemperature situations. FDMF6707V also incorporates features such as Skip Mode (SMOD) for improved lightload efficiency, along with a 3-state 3.3V PWM input for compatibility with a wide range of PWM controllers.
Features
Over 93% Peak-Efficiency Internal 12V to 5V Linear Regulator High-Current Handling: 50A High-Performance PQFN Copper-Clip Package 3-State 3.3V PWM Input Driver Skip-Mode SMOD# (Low-Side Gate Turn Off) Input Thermal Warning Flag for Over-Temperature Condition Driver Output Disable Function (DISB# Pin) Internal Pull-Up and Pull-Down for SMOD# and DISB# Inputs, Respectively Fairchild PowerTrench® Technology MOSFETs for Clean Voltage Waveforms and Reduced Ringing Fairchild SyncFET™ (Integrated Schottky Diode) Technology in the Low-Side MOSFET Integrated Bootstrap Schottky Diode Adaptive Gate Drive Timing for Shoot-through Protection Under-Voltage Lockout (UVLO) Optimized for Switching Frequencies up to 1MHz Low-Profile SMD Package Fairchild Green Packaging and RoHS Compliant Based on the Intel® 4.0 DrMOS Standard
Applications
High-Performance Gaming Motherboards Compact Blade Servers, V-Core and Non-V-Core DC-DC Converters Desktop Computers, V-Core and Non-V-Core DC-DC Converters Workstations High-Current DC-DC Point-of-Load (POL) Converters Networking and Telecom Microprocessor Voltage Regulators Small Form-Factor Voltage Regulator Modules
Ordering Information
Part Number
FDMF6707V
Current Rating
50A
Package
40-Lead, Clipbond PQFN DrMOS, 6.0mm x 6.0mm Package
Top Mark
FDMF6707V
www.fairchildsemi.com
© 2011 Fairchild Semiconductor Corporation FDMF6707V • Rev. 1.0.3
Free Datasheet http://www.datasheet4u.com/
FDMF6707V — Extra-Small High-Performance, High-Frequency DrMOS Module
Typical Application Circuit
Figure 1.
Typical Application Circuit
DrMOS Block Diagram
VDRV VCIN BOOT VIN
DBoot
VIN UVLO VCC UVLO DISB # 10µA 5V LDO
GH Logic
Level Shift
GH
(Q1) HS Power MOSFET
30k PHASE
VCI
1 k RUP_PWM PWM Input 3 - State Logic Dead Time Control
VSWH
RDN_PWM
GL Logic THWN# Temp. Sense 10µA VCIN
VCIN GL
(Q2) LS Power MOSFET
30k
CGND
SMOD #
PGND
Figure 2.
DrMOS Block Diagram
© 2011 Fairchild Semiconductor Corporation FDMF6707V • Rev. 1.0.3
www.fairchildsemi.com 2
Free Datasheet http://www.datasheet4u.com/
FDMF6707V — Extra-Small High-Performance, High-Frequency DrMOS Module
Pin Configuration
Figure 3.
Bottom View
Figure 4.
Top View
Pin Definitions
Pin #
1 2 3 4 5, 37, 41 6 7 8 9 - 14, 42 15, 29 35, 43 16 – 28 36 38 39 40
Name
Description
When SMOD#=HIGH, the low-side driver is the inverse of PWM input. When SMOD#=LOW, the SMOD# low-side driver is disabled. This pin has a 10µA internal pull-up current source. Do not add a noise filter capacitor. VCIN VDRV BOOT Linear regulator 5V output. Minimum 1µF ceramic capacitor recommended from this pin to CGND. Linear regulator input. Minimum 1µF ceramic capacitor is recommended connected as close as possible from this pin to CGND. Bootstrap supply input. Provides voltage supply to the high-side MOSFET driver. Connect a bootstrap capacitor from this pin to PHASE.
CGND IC ground. Ground return for driver IC. GH For manufacturing test only. This pin must float: it must not be connected to any pin. No connect. The pin is not electrically connected internally, but can be connected to VIN for convenience. Power input. Output stage supply voltage. Switch node input. Provides return for high-side bootstrapped driver and acts as a sense point for the adaptive shoot-through protection. For manufacturing test only. This pin must float. It must not be connected to any pin. Thermal warning.