PLL52C64-06

PLL52C64-06 Clock Gen er ator with Zero De lay Out put Buff ers FEATURES n Generates 7 synchronous zero delay PCI bus clocks. n Designed to work with PLL52C64-05 or PLL52C64-25 PIN INFORMATION for EMI reduction. n Less than 250ps propagation delay from BCLKIN to BCLK n n n n n n n n output when equally loaded. Two 14.318Mz reference clocks Two 2.5V IOAPIC clocks for dual processors. One 24Mhz and one 48Mhz USB clock All outputs have very low Cycle to cycle jitter (<150ps) < 250ps output skew between PCI bus clock < 250ps output skew between IOAPIC clock 50% duty cycle outputs. Available in 300mil 24 pin SOP. DESCRIPTION The PLL52C64-06 is a high performance clock generator designed specifically to support the very tight timing requirement of Pentium PC Motherboards. All output clocks skew and jitter performance are designed to be fully compliant with INTEL Pentium CPU timing requirements. This device associates with PLL52C64-05/-25 is the solution for the very stringent EMI specifications when applied to PC Motherboards with up to 4 DIMM SDRAM. BLOCK DIAGRAM 45437 Warm Springs Blvd., Fre mont, Cali for nia 94539, Tel : 510- 492- 0990 Fax : 510- 492- 0991 9705.Rev.1C Page 1 / m o c . u 4 t e e h s a t a d . www / / : p t t h t e e h s a t a D e e r F Phase Link Labs. Inc. PLL52C64-06 Clock Generator with Zero De lay Out put Buff ers SIGNAL DESCRIPTIONS NAME VDD VDDq2 VSS XIN XOUT BCLK(0:6) BCLKIN IOAPIC(0:1) 24Mhz 48Mhz REF(0:1) 12,17,22 6 3,9,15,19 1 2 7,8,10,11,...