HIP9020

HIP9020 October 1993 Programmable Quad Buffer with Pre and Post Scaler Dividers Description The HIP9020 is a Vehicle Speed Sensor (VSS) Buffer IC. It receives sinusoidal vehicle speed information from a speedometer signal source. The signal is amplified and squared before frequency processing is done. The circuit provides pin programmable integer prescaler and postscaler dividers to scale the output frequencies. The prescaler divider output of the frequency doubler is mode selected for 1 and 6 through 11. The postscaler mode is selected to the Output 3 with a divide by 1 or 2. The four VOX outputs are open collector drivers. Speed Sensor Input (SSI) - When current limited with a 40kΩ source impedance from the vehicle speed sensor, the SSI input is capable of functioning over a wide range of input signal. The limiter and squaring action is derived from the zero crossing of the input signal. The signal is converted into a square wave with a controlled hysteresis squaring amplifier. Power Supply - The power supply pin 2 input is intended to operate from a 5.0V ± 0.3V source. The internal reference sources are derived from a temperature stable bandgap; including an optional 5.7V shunt regulator which may be used as shown in Figure 2. Output Drivers - Each output driver is an open NPN collector with a zener clamp level of typically 35V and short circuit current limiting. Each output is capable of sinking 15mA of current. Features Sine Wave Speedometer Input Input Limiting . . ...