Document
Rev 3.3 March 2005
LM98513 Dual-Channel, 10-Bit, 50 MSPS Copier Signal Processor
LM98513 Dual-Channel, 10-Bit, 50 MSPS Copier Signal Processor
General Description
The LM98513 is a fully integrated, high performance 10-Bit, 50 MSPS CCD signal processing solution for digital copiers and scanners. High-speed signal throughput is achieved with an innovative 2-channel architecture including sample and hold, programmable gain and offset correction and analog-to-digital conversion. The fully differential processing channels show exceptional noise immunity, having a very low noise floor of 68dB each. The fast, temperature stable, 8 bit programmable gain amplifiers are linear-in-dB which enables fine adjustments to the signal gain and minimizes cross-channel gain error caused by mismatch in the CCD output circuitry. The independently controlled offset correction circuits utilize 8-bit offset DACs to correct signal and cross-channel offsets. The 10bit analog-to-digital converters have excellent dynamic performance making the LM98513 transparent in the image reproduction chain.
Features
3 Volt Single Power Supply Low Power CMOS Design 4 Wire Serial Interface 2.5 Volt Data Output Levels Dual Inputs with Symmetrical Architecture Even/Odd Channel Offset Correction Digital Black Level Clamp Programmable Input Clamp
Key Specifications
Maximum Input Level Input Sampling Rate PGA Gain Steps PGA Gain Range ADC Resolution ADC Sampling Rate Noise Floor 0.0 dB Gain,1.5 Volt input Power Dissipation AV+=DV+=DV+I/O=3.0V Operating Temp 1.5 Volt peak-peak 25 MSPS 256 Steps 0.0 - 20.0 dB 10-Bit 25 MSPS -68dB 415 mW (typical) 0 to 70oC
Applications
Digital Plain Paper Copiers Multi-Function Printers Facsimile Equipment Desktop Publishing Flatbed or Handheld Color Scanners High-speed Document Scanner
System Block Diagram
CCD/CIS Sensor LM98513 10 Imager Processor
Sensor Drivers
Timing Generator
Motor Controllers
Microcontroller
©2005 National Semiconductor Corporation
www.national.com
Free Datasheet http://www.datasheet4u.com/
LM98513
Overall Chip Block Diagram
VREFP
PULSE
CLPIN
Timing Control
Sample Sample
VREFN
Offset DAC
Black Level Clamp / Averaging 10-Bit A/D Converter 50Mhz Digital Mulitplexor 10
VIN ODD
Input Clamp
S/H
PGA
BLKCLP
MCLK
SHD
10
VIN EVEN
Input Clamp
S/H
Offset DAC
Black Level Clamp / Averaging 10 10-Bit A/D Converter
Digital Output Data
PGA
Serial Interface
CE0 CE1
CLPIN
PULSE
SCLK
SEN
SDI
Figure 1: Chip Block Diagram
LM98513 TSSOP Chip Pin Out Diagram
AV+ AV+ AGND VIN EVEN VCLP EVEN CE1 CE0 AOUT+ EVEN AOUT- EVEN BLKCLP VREFT EVEN SDI PULSE DV+ DGND Vin Test VREFT ODD SEN AOUT- ODD AOUT+ ODD VCLP ODD VIN ODD SDO AGND AV+ AV+ SCLK SHP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 MCLK RESET VREFP EVEN VREFN EVEN VREFB EVEN OE DGND I/O DV+ I/O DOUT9 DOUT8 DOUT7 DOUT6 DOUT5 DV+ DGND DOUT4 DOUT3 DOUT2 DOUT1 DOUT0 DV+ I/O DGND I/O SHD NC VREFB ODD VREFN ODD VREFP ODD CLPIN
LM98513
56 PIN TSSOP
Figure 2: LM98513 Pin Out Diagram
©2005 National Semiconductor Corporation
2
VREFB
VREFT
43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
SDO
www.national.com
Free Datasheet http://www.datasheet4u.com/
LM98513
Ordering Information
Commercial (0°C ≤ TA ≤ +70°C) LM98513 CCMT NS Package TSSOP
Typical Application Circuit
System Control Copier Control Serial Control Bus
56
MCLK
55
RESET
28
SHP
34
SHD
51
OE
29
CLPIN
13
BLKCLP PULSE
10
27 12 23 18
SDO SEN SCLK SDI
7
CE0
6
CE1
11
0.1µF
VREFT EVEN 10uF
VREFP EVEN
54
0.1µF
52
0.1µF
VREFB EVEN
VREFN EVEN
53
0.1µF 200−510Ω
17
0.1µF
VREFT ODD 10uF
VREFP ODD
30
0.1µF
32
0.1µF
VREFB ODD
VREFN ODD
31
0.1µF 200−510Ω
3V
49 DV+ I/O 50 DGND I/O
AOUT+ EVEN 8
LM98513
AOUT- EVEN 9
10µF
0.1µF
3V
36 DV+ I/O 35 DGND I/O
AOUT+ ODD 20 AOUT- ODD 19
10µF
0.1µF
CLAMP VOLTAGE
5 VCLP EVEN
10µF
0.1µF
CLAMP VOLTAGE
AV+ 26 21 VCLP ODD AV+ 25 AGND 24
3V
10µF
0.1µF
3V
0.1µF
10µF
43 DV+
10µF 0.1µF
AV+ 1 AV+ 2 AGND 3
VIN TEST
VIN EVEN VIN ODD
3V
42 DGND
3V
0.1µF
10µF
14 DV+
10µF 0.1µF
15 DGND
D9
D8
D7
D6
D5
D4
D3
D2
D1
16
4
22
48 47 46 45 44 41 40 39 38 37
0.1µF 0.1µF 0.1µF
Video Inputs
Digital Video Bus
Figure 3: Typical Application Circuit Diagram
©2005 National Semiconductor Corporation
3
D0
www.national.com
Free Datasheet http://www.datasheet4u.com/
LM98513
Pin Descriptions
Pin 1 Name AV+ I/O I Typ P Res Description +3.3 Volt power supply for the analog circuits. Bypass supply each supply pin with 0.1µF and 10µF capacitors in parallel. +3.3 Volt power supply for the analog circuits. Bypass supply each supply pin with 0.1µF and 10µF capacitors in parallel. Analog ground return. Even channel analog input signal. AC-couple to imager output through a 0.1µF capacitor. Input Clamp Voltage (1.5V). Normally bypassed with a 0.1µF, and a 10µF capacitor to ground. An external reference voltage may be applied to this pin. MSB of Chi.