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TC4013BFN

Toshiba

DUAL D-TYPE FLIP-FLOP

TC4013BP/BF/BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4013BP,TC4013BF,TC4013BFN TC4013B Dual D-T...


Toshiba

TC4013BFN

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Description
TC4013BP/BF/BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4013BP,TC4013BF,TC4013BFN TC4013B Dual D-Type Flip Flop TC4013B contains two independent circuits of D type flip-flop. The input level applied to DATA input are transferred to Q and Q output by rising edge of the clock pulse. When SET input is placed at “H”, and RESET input is placed at “L”, outputs become Q = “H”, and Q = “L”. When RESET input is placed at “H”, and SET input is placed at “L”, outputs become Q = “L”, and Q = “H”. When both of RESET input and SET input are at “H”, outputs become Q = “H” and Q = “H”. Pin Assignment Note: xxxFN (JEDEC SOP) is not available in Japan. TC4013BP TC4013BF Block Diagram TC4013BFN Weight DIP14-P-300-2.54 SOP14-P-300-1.27A SOL14-P-150-1.27 : 0.96 g (typ.) : 0.18 g (typ.) : 0.12 g (typ.) 1 2007-10-01 Truth Table RESET L H H L L L Inputs SET DATA H* L* H* LL LH L* *: Don’t care Δ: Level change ・: No change CKΔ * * * Logic Diagram Outputs Qn + 1 Qn + 1 HL LH HH LH HL Qn・ Qn ・ TC4013BP/BF/BFN Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit DC supply voltage Input voltage Output voltage DC input current Power dissipation Operating temperature range Storage temperature range VDD VIN VOUT IIN PD Topr Tstg VSS − 0.5~VSS + 20 VSS − 0.5~VDD + 0.5 VSS − 0.5~VDD + 0.5 ±10 300 (DIP)/180 (SOIC) −40~85 −65~150 V V V mA mW °C °C Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performanc...




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