DatasheetsPDF.com

Sink Drivers. 6821SLWT Datasheet

DatasheetsPDF.com

Sink Drivers. 6821SLWT Datasheet






6821SLWT Drivers. Datasheet pdf. Equivalent




6821SLWT Drivers. Datasheet pdf. Equivalent





Part

6821SLWT

Description

DABiC-5 8-Bit Serial Input Latched Sink Drivers



Feature


Data Sheet 26185.112B A6821 DABiC-5 8-B it Serial Input Latched Sink Drivers A merged combination of bipolar and MOS t echnology gives these devices an interf ace flexibility beyond the reach of st andard logic buffers and power driver a rrays. Typical applications include dri ving multiplexed LED displays or incand escent lamps. The A6821 has an eight-bi t CMOS shift registe.
Manufacture

Allegro MicroSystems

Datasheet
Download 6821SLWT Datasheet


Allegro MicroSystems 6821SLWT

6821SLWT; r and CMOS control circuitry, eight CMOS data latches, and eight bipolar curren t-sinking Darlington output drivers. Th e CMOS inputs are compatible with stand ard CMOS logic levels. TTL circuits may require the use of appropriate pull-up resistors. By using the serial data ou tput, the drivers can be cascaded for i nterface applications requiring additio nal drive lines. P.


Allegro MicroSystems 6821SLWT

ackage LW 16-pin Wide Body SOIC The A682 1SA is furnished in a standard 16-pin p lastic DIP. The A6821EA is a 16-pin pla stic DIP, capable of operation from -40 °C to +85°C. The A6821SLW is a 16-lea d wide-body SOIC, for surfacemount appl ications. These devices are lead (Pb) f ree, with 100% matte tin plated leadfra mes. Package A 16-pin DIP FEATURES „ 3.3 V to 5 V logic s.


Allegro MicroSystems 6821SLWT

upply range Power on reset (POR) To 10 M Hz data input rate CMOS, TTL compatible –40°C operation available „ „ „ „ ABSOLUTE MAXIMUM RATINGS Output Vol tage, VOUT ............................ ............. 50 V Logic Supply Voltage , VDD.................................. . 7 V Input Voltage Range, VIN ........ ...... –0.3 V to VDD +0.3 V Continuou s Output Current (each outp.

Part

6821SLWT

Description

DABiC-5 8-Bit Serial Input Latched Sink Drivers



Feature


Data Sheet 26185.112B A6821 DABiC-5 8-B it Serial Input Latched Sink Drivers A merged combination of bipolar and MOS t echnology gives these devices an interf ace flexibility beyond the reach of st andard logic buffers and power driver a rrays. Typical applications include dri ving multiplexed LED displays or incand escent lamps. The A6821 has an eight-bi t CMOS shift registe.
Manufacture

Allegro MicroSystems

Datasheet
Download 6821SLWT Datasheet




 6821SLWT
A6821
DABiC-5 8-Bit Serial Input Latched Sink Drivers
Package A
16-pin DIP
Package LW
16-pin Wide Body SOIC
A merged combination of bipolar and MOS technology gives these
devices an interface exibility beyond the reach of standard logic
buffers and power driver arrays. Typical applications include driving
multiplexed LED displays or incandescent lamps.
The A6821 has an eight-bit CMOS shift register and CMOS control
circuitry, eight CMOS data latches, and eight bipolar current-sinking
Darlington output drivers.
The CMOS inputs are compatible with standard CMOS logic levels.
TTL circuits may require the use of appropriate pull-up resistors. By
using the serial data output, the drivers can be cascaded for interface
applications requiring additional drive lines.
The A6821SA is furnished in a standard 16-pin plastic DIP. The
A6821EA is a 16-pin plastic DIP, capable of operation from -40°C to
+85°C. The A6821SLW is a 16-lead wide-body SOIC, for surface-
mount applications. These devices are lead (Pb) free, with 100% matte
tin plated leadframes.
ABSOLUTE MAXIMUM RATINGS
Output Voltage, VOUT .........................................50 V
Logic Supply Voltage, VDD...................................7 V
Input Voltage Range, VIN ..............–0.3 V toVDD+0.3 V
Continuous Output Current (each output), IOUT ... 500 mA
Package Power Dissipation, PD
A6821SA/A6821EA..................................2.1 W
A6821SLW............................................... 1.5 W
Operating Temperature Range
Ambient Temperature, TA ............–20°C to +85°C
Storage Temperature, TS ..........–55°C to +150°C
Caution: CMOS devices have input-static protection,
but are susceptible to damage when exposed to
extremely high static-electrical charges.
FEATURES
„ 3.3 V to 5 V logic supply range
„ Power on reset (POR)
„ To 10 MHz data input rate
„ CMOS, TTL compatible
„ –40°C operation available
„ Schmitt trigger inputs for improved
noise immunity
„ Low-power CMOS logic and latches
„ High-voltage current-sink outputs
„ Internal pull-up/pull down resistors
APPLICATIONS
„ Multiplexed LED displays
„ Incandescent lamps
Use the following complete part numbers when ordering:
Part Number
A6821SA-T
A6821EA-T
A6821SLW-T
Package
16-pin DIP
16-pin DIP
16-pin wide body SOIC
Ambient
–20ºC to +85ºC
–40ºC to +85ºC
–20ºC to +85ºC
Free Datasheet http://www.datasheet4u.com/




 6821SLWT
A6821
DABiC-5 8-Bit Serial Input Latched Sink Drivers
Functional Block Diagram
CLOCK
S E R IAL
DATA IN
L O G IC
GR OUND
S E R IAL-P AR ALLE L S HIFT R E G IS TE R
LATCHE S
L O G IC
V DD S UP P LY
S E R IAL
DATA OUT
S TR OBE
MOS
B IP O LAR
S UB
OUTPUT E NABLE
(AC TIVE LOW)
P OWE R
GR OUND
OUT 1 OUT 2 OUT 3 OUT 4 OUT 5 OUT 6 OUT 7 OUT 8
Typical Input Circuits
VDD
STROBE
OUTPUT
ENABLE
CLOCK
SERIAL
DATA IN
VDD
Typical Output Driver
OUT
7.2 kΩ
3 kΩ
SUB
www.allegromicro.com
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
2
Free
Datas




 6821SLWT
A6821
DABiC-5 8-Bit Serial Input Latched Sink Drivers
ELECTRICAL CHARACTERISTICS1 Unless otherwise noted: TA = 25°C, logic supply operating voltage Vdd= 3.0 V to 5.5 V
Vdd = 3.3 V
Vdd = 5 V
Characteristic
Symbol
Test Conditions
Min. Typ. Max. Min. Typ. Max.
Output Leakage Current
Collector–Emitter Saturation
Voltage
Input Voltage
Input Resistance
Serial Data Output Voltage
Maximum Clock Frequency2
Logic Supply Current
ICEX
VCE(SAT)
VIN(1)
VIN(0)
RIN
VOUT(1)
VOUT(0)
fc
IDD(1)
IDD(0)
VOUT = 50 V
IOUT = 100 mA
IOUT = 200 mA
IOUT = 350 mA
IOUT = –200 μA
IOUT = 200 μA
One output on, OE = L, ST = H
All outputs off, OE = H, ST = H,
P1 through P8 = L
– – 10 – – 10
– – 1.1 – – 1.1
– – 1.3 – – 1.3
– – 1.6 – – 1.6
2.2 –
– 3.3
– – 1.1 – – 1.7
50 –
– 50
2.8 3.05 – 4.5 4.75 –
– 0.15 0.3 – 0.15 0.3
10 –
– 10
– – 2.0 – – 2.0
– – 100 – – 100
Output Enable-to-Output Delay
Strobe-to-Output Delay
Output Fall Time
Output Rise Time
Clock-to-Serial Data Out Delay
tdis(BQ)
ten(BQ)
tp(STH-QL)
tp(STH-QH)
tf
tr
tp(CH-SQX)
VCC = 50 V, R1 = 500 Ω, C1 30 pF
VCC = 50 V, R1 = 500 Ω, C1 30 pF
VCC = 50 V, R1 = 500 Ω, C1 30 pF
VCC = 50 V, R1 = 500 Ω, C1 30 pF
VCC = 50 V, R1 = 500 Ω, C1 30 pF
VCC = 50 V, R1 = 500 Ω, C1 30 pF
IOUT = ±200 μA
– 1.0 –
– 1.0 –
– 1.0 –
– 1.0 –
– 1.0 –
– 1.0 –
50 – –
– 1.0
– 1.0
– 1.0
– 1.0
– 1.0
– 1.0
50 –
1Positive (negative) current is dened as conventional current going into (coming out of) the specied device pin.
2Operation at a clock frequency greater than the specied minimum value is possible but not warranteed.
Units
μA
V
V
V
V
V
kΩ
V
V
MHz
mA
μA
μs
μs
μs
μs
μs
μs
ns
Truth Table
Serial
Data Clock
Input Input
H
L
X
Shift Register Contents Serial
Data Strobe
I1 I2 I3 ... I8 Output Input
H R1 R2 ...
L R1 R2 ...
R1 R2 R3 ...
X X X ...
R7
R7
R8
X
R7
R7
R8
X
L
P1 P2 P3 ... P8 P8 H
L = Low Logic Level
H = High Logic Level
X = Irrelevant
P = Present State
R = Previous State
OE = Output Enable
ST = Strobe
Latch Contents
I1 I2 I3 ... I8
R1 R2 R3 ... R8
P1 P2 P3 ... P8
X X X ... X
Output
Enable
Input
L
H
Output Contents
I1 I2 I3 ... I8
P 1 P2 P3 ... P8
H H H ... H
www.allegromicro.com
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3
Free Datasheet http://www.datasheet4u.com/






Recommended third-party 6821SLWT Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)