INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic Family ...
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF4007UB gates Dual complementary pair and inverter
Product specification File under Integrated Circuits, IC04 January 1995
Philips Semiconductors
Product specification
Dual complementary pair and inverter
DESCRIPTION
HEF4007UB gates
The HEF4007UB is a dual complementary pair and an inverter with access to each device. It has three n-channel and three p-channel enhancement mode MOS
transistors.
Fig.1 Schematic diagram.
PINNING SP2, SP3 DP1, DP2 DN1, DN2 SN2, SN3 Fig.2 Pinning diagram. DN/P3 G1 to G3 HEF4007UBP(N): HEF4007UBD(F): HEF4007UBT(D): 14-lead DIL; plastic (SOT27-1) 14-lead DIL; ceramic (cerdip) (SOT73) 14-lead SO; plastic (SOT108-1) ( ): Package Designator North America FAMILY DATA, IDD LIMITS category GATES See Family Specifications for VIH/VIL unbuffered stages source connections to 2nd and 3rd p-channel
transistors drain connections from the 1st and 2nd p-channel
transistors drain connections from the 1st and 2nd n-channel
transistors source connections to the 2nd and 3rd n-channel
transistors common connection to the 3rd p-channel and n-channel
transistor drains gate connections to n-channel and p-channel of the three
transistor pairs
January 1995
2
Philips Semiconductors
Product specification
Dual complementary pair and inverter
AC CHARACTERI...