HEX non-inverting buffers
HEF4050B
Hex non-inverting buffers
Rev. 8 — 18 November 2011
Product data sheet
1. General description
The HEF4050B p...
Description
HEF4050B
Hex non-inverting buffers
Rev. 8 — 18 November 2011
Product data sheet
1. General description
The HEF4050B provides six non-inverting buffers with high current output capability suitable for driving TTL or high capacitive loads. Since input voltages in excess of the buffers’ supply voltage are permitted, the buffers may also be used to convert logic levels of up to 15 V to standard TTL levels. Their guaranteed fan-out into common bipolar logic elements is shown in Table 3.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Accepts input voltages in excess of the supply voltage Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C Complies with JEDEC standard JESD 13-B
3. Applications
LOCMOS (Local Oxidation CMOS) to DTL/TTL converter HIGH sink current for driving two TTL loads HIGH-to-LOW level logic conversion
4. Ordering information
Table 1. Ordering information All types operate from 40 C to +85 C.
Type number Package
Name
Description
HEF4050BP
DIP16
plastic dual in-line package; 16 leads (300 mil)
HEF4050BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
Version SOT38-4 SOT109-1
NXP Semiconductors
5. Functional diagram
HEF4050B
Hex non-inverting buffers
3 1A
1Y 2
2A 5
2Y 4
7 3A
...
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