HEF4072B

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4072B gates Dual 4-input OR gate Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Dual 4-input OR gate DESCRIPTION The HEF4072B provides the positive dual 4-input OR function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance. HEF4072B gates Fig.2 Pinning diagram. HEF4072BP(N): 14-lead DIL; plastic (SOT27-1) HEF4072BD(F): 14-lead DIL; ceramic (cerdip) (SOT73) HEF4072BT(D): 14-lead SO; plastic Fig.1 Functional diagram. (SOT108-1) ( ): Package Designator North America Fig.3 Logic diagram (one gate). FAMILY DATA, IDD LIMITS category GATES See Family Specifications January 1995 2 Philips Semiconductors Product specification Dual 4-input OR gate AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V Propagation delays In → On HIGH to LOW 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 10 15 tTLH tTHL tPLH tPHL 80 35 25 75 35 25 60 30 20 60 30 20 155 70 55 145 70 55 120 60 40 120 60 40 ns ns ns ns ns ns ns ns ns ns ns ns SYMBOL TYP. MAX. HEF4072B gates TYPICAL EXTRAPOLATION FORMULA 53 ns + (0,55 ns/pF) CL 24 ns + (0,23 ns/pF) CL 17 ns + (0,16 ns/pF) CL 48 ns + (...