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UCT T PROD ACEMEN at E T L E r L P e t E O n R S OB DED pport Ce m/tsc N E Su co MM ECO echnical .intersil. w T NO R ...
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UCT T PROD ACEMEN at E T L E r L P e t E O n R S OB DED pport Ce m/tsc N E Su co MM ECO echnical .intersil. w T NO R Data w r Sheet December 1995, Rev. G u w ct o L or conta -INTERSI 1-888
EL2019
FN7025
Fast, High Voltage Comparator with Master Slave Flip-Flop
The EL2019 offers a new feature previously unavailable in a comparator before—a master/slave edge triggered flip-flop. The comparator output will only change output state after a positive going clock edge is applied. Thus the output can't feed back to the input and cause oscillation. Manufactured with Elantec's proprietary Complementary Bipolar process, this device uses fast
PNP and
NPN transistors in the signal path. A unique circuit design gives the inputs the ability to handle large common mode and differential mode signals, yet retain high speed and excellent accuracy. Careful design of the front end insures speed and accuracy when operating with a mix of small and large signals. The three-state output stage is designed to be TTL compatible for any power supply combination, yet it draws a constant current and does not generate current glitches. When the output is disabled, the supply current consumption drops by 50%, but the input stage and master slave flip-flop remain active.
Features
Comparator cannot oscillate Fast response—5ns data to clock setup, 20ns clock to output Wide input differential voltage range—24V on ±15V supplies Wide input common mode voltage range—±12V Precision input stage—VOS = ...