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H5PS1G63JFR-xxC Dataheets PDF



Part Number H5PS1G63JFR-xxC
Manufacturers hynix
Logo hynix
Description 1Gb DDR2 SDRAM
Datasheet H5PS1G63JFR-xxC DatasheetH5PS1G63JFR-xxC Datasheet (PDF)

H5PS1G63JFR Series 1Gb DDR2 SDRAM H5PS1G63JFR-xxC H5PS1G63JFR-xxI H5PS1G63JFR-xxL H5PS1G63JFR-xxJ This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.7 / Nov. 2011 1 Free Datasheet http://www.datasheetlist.com/ Release H5PS1G63JFR Series Revision Details Rev. 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 History Released Type Correction - Specifi.

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H5PS1G63JFR Series 1Gb DDR2 SDRAM H5PS1G63JFR-xxC H5PS1G63JFR-xxI H5PS1G63JFR-xxL H5PS1G63JFR-xxJ This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.7 / Nov. 2011 1 Free Datasheet http://www.datasheetlist.com/ Release H5PS1G63JFR Series Revision Details Rev. 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 History Released Type Correction - Specific Notes for dedicated AC parameters 15 Update IDD Updated tREFI Condition & VREF units Updated IDD Values (3PF/3PS) PKG dimension update PKG dimension update Operating Temp & Key Features update Draft Date Mar. 2011 Aug. 2011 Aug. 2011 Sep. 2011 Sep. 2011 Nov. 2011 Nov. 2011 Nov. 2011 Rev. 1.7 / Nov. 2011 2 Free Datasheet http://www.datasheetlist.com/ Release H5PS1G63JFR Series Contents 1. Description 1.1 Device Features and Ordering Information 1.1.1 Key Features 1.1.2 Ordering Information 1.1.3 Operating Frequency 1.2 Pin configuration 1.3 Pin Description 2. Maximum DC ratings 2.1 Absolute Maximum DC Ratings 2.2 Operating Temperature Condition 3. AC & DC Operating Conditions 3.1 DC Operating Conditions 3.1.1 Recommended DC Operating Conditions(SSTL_1.8) 3.1.2 ODT DC Electrical Characteristics 3.2 DC & AC Logic Input Levels 3.2.1 Input DC Logic Level 3.2.2 Input AC Logic Level 3.2.3 AC Input Test Conditions 3.2.4 Differential Input AC Logic Level 3.2.5 Differential AC Output Parameters 3.3 Output Buffer Levels 3.3.1 Output AC Test Conditions 3.3.2 Output DC Current Drive 3.3.3 OCD default characteristics 3.4 IDD Specifications & Measurement Conditions 3.5 Input/Output Capacitance 4. AC Timing Specifications 5. Package Dimensions Rev. 1.7 / Nov. 2011 3 Free Datasheet http://www.datasheetlist.com/ Release H5PS1G63JFR Series 1. Description 1.1 Device Features & Ordering Information 1.1.1 Key Features • • • • • • • • • • • • • VDD = 1.8 +/- 0.1V VDDQ = 1.8 +/- 0.1V All inputs and outputs are compatible with SSTL_18 interface 8 banks Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous-data transaction aligned to bidirectional data strobe (DQS, DQS) Differential Data Strobe (DQS, DQS) Data outputs on DQS, DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chip DLL align DQ, DQS and DQS transition with CK transition DM mask write data-in at the both rising and falling edges of the data strobe All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock Programmable CAS latency 3, 4, 5 and 6 supported Programmable additive latency 0, 1, 2, 3, 4 and 5 supported Programmable burst length 4/8 with both nibble sequential and interleave mode Internal eight bank operations with single pulsed RAS Auto refresh and self refresh supported tRAS lockout supported 8K refresh cycles /64ms JEDEC standard 84ball FBGA(x16) Full strength driver option controlled by EMR On Die Termination supported Off Chip Driver Impedance Adjustment supported Self-Refresh High Temperature Entry • • • • • • • • • • • • • Average Refresh Cycle (Tcase 0 oC~ 95 oC) - 7.8 µs at 0oC ~ 85 oC - 3.9 µs at 85oC ~ 95 oC Commercial Temperature( 0oC ~ 85 oC) Industrial Temperature( -40oC ~ 95 oC) Rev. 1.7 / Nov. 2011 4 Free Datasheet http://www.datasheetlist.com/ Release H5PS1G63JFR Series Ordering Information Part No. H5PS1G63JFR-xx*C H5PS1G63JFR-xx*I H5PS1G63JFR-xx*L 64Mx16 Configuration Power Consumption Normal Consumption Normal Consumption Low Power Consumption (IDD6 Only) Low Power Consumption (IDD6 Only) Operation Temp Commercial Industrial Commercial 84 Ball fBGA Package H5PS1G63JFR-xx*J Note: Industrial -XX* is the speed bin, refer to the Operating Frequency table for complete part number. -xxP and xxQ are the low current bin, refer to the IDD specification table. - Hynix Halogen-free products are compliant to RoHS. Hynix supports Lead & Halogen free parts for each speed grade with same specification, except Lead free materials. We'll add "R" character after "F" for Lead & Halogen free products Operating Frequency Grade E3 C4 Y5 S6 S5 G7 Note: -G7 is a special speed product used in electronic engineering for high speed storage of the working data of a consumer digital electronic device. - x16 product only tCK(ns) 5 3.75 3 2.5 2.5 1.875 CL 3 4 5 6 5 7 tRCD 3 4 5 6 5 7 tRP 3 4 5 6 5 7 Unit Clk Clk Clk Clk Clk Clk Rev. 1.7 / Nov 2011 5 Free Datasheet http://www.datasheetlist.com/ Release H5PS1G63JFR Series 1.2 Pin Configuration & Address Table 64Mx16 DDR2 PIN CONFIGURATION(Top view: see balls through package) 1 2 3 7 8 9 VDD DQ14 VDDQ DQ12 VDD DQ6 VDDQ DQ4 VDDL NC VSSQ DQ9 VSSQ NC VSSQ DQ1 VSSQ VREF CKE VSS UDM VDDQ DQ11 VSS LDM VDDQ DQ3 VSS WE BA1 A1 A5 A9 NC A B C D E F G H J K L M N P R VSSQ UDQS VDDQ DQ10 VSSQ LDQS VDDQ DQ2 VSSDL RAS CAS A2 A6 A11 NC UDQS VSSQ DQ8 VSSQ LDQS VSSQ DQ0 VSSQ CK CK C.


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