8-bit addressable latch
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• The IC04 LOCMOS ...
Description
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The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
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HEF4724B MSI 8-bit addressable latch
Product specification File under Integrated Circuits, IC04 January 1995
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Philips Semiconductors
Product specification
8-bit addressable latch
DESCRIPTION The HEF4724B is an 8-bit addressable latch with three address inputs (A0 to A2), a data input (D), an active LOW enable input (E), an active HIGH clear input (CL), and eight parallel latch outputs (O0 to O7). When E and CL are HIGH, all outputs (O0 to O7) are LOW. Eight-channel demultiplexing or active HIGH 1-of-8 decoding with output enable operation occurs when CL is HIGH and E is LOW. When CL and E are LOW, the
HEF4724B MSI
selected output (O0 to O7; determined by A0 to A2) follows D. When E goes HIGH, the contents of the latch are stored. When operating in the addressable latch mode (E = CL = LOW), changing more than one bit of A0 to A2 could impose a transient wrong address. Therefore, this should only be done while in the memory mode (E = HIGH, CL = LOW).
Fig.2 Pinning diagram.
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16-lead DIL; plastic (SOT38-1) 16-lead DIL; ceramic (cerdip) (SOT74) 16-lead SO; plastic (SOT109-1)
HEF4724BP(N): HEF4724BD(F): HEF4724BT(D):
( ): Package Designator North ...
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