Flash Memory. AT49F8192AT Datasheet

AT49F8192AT Datasheet PDF, Equivalent


Part Number

AT49F8192AT

Description

(AT49F008A / AT49F8192A) 8-megabit (1M x 8 / 512K x 16) Flash Memory

Manufacture

Atmel

Total Page 18 Pages
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AT49F8192AT Datasheet
Features
Single-voltage Operation
– 5V Read
– 5V Programming
Fast Read Access Time – 70 ns
Internal Erase/Program Control
Sector Architecture
– One 8K Word (16K Bytes) Boot Block with Programming Lockout
– Two 4K Word (8K Bytes) Parameter Blocks
– One 496K Word (992K Bytes) Main Memory Array Block
Fast Sector Erase Time – 10 seconds
Byte-by-byte or Word-by-word Programming – 10 µs Typical
Hardware Data Protection
Data Polling for End of Program Detection
Low Power Dissipation
– 50 mA Active Current
– 100 µA CMOS Standby Current
Typical 10,000 Write Cycles
8-megabit
(1M x 8/
512K x 16)
Flash Memory
Description
The AT49F008A(T) and AT49F8192A(T) are 5-volt, 8-megabit Flash memories orga-
nized as 1,048,576 words of 8 bits each or 512K words of 16 bits each. Manufactured
with Atmel’s advanced nonvolatile CMOS technology, the devices offer access times
to 90 ns with power dissipation of just 275 mW. When deselected, the CMOS standby
current is less than 100 µA.
The device contains a user-enabled “boot block” protection feature. Two versions of
the feature are available: the AT49F008A/8192A locates the boot block at lowest
order addresses (“bottom boot”); the AT49F008AT/8192AT locates it at highest order
addresses (“top boot”).
To allow for simple in-system reprogrammability, the AT49F008A(T)/8192A(T) does
not require high-input voltages for programming. Reading data out of the device is
similar to reading from an EPROM; it has standard CE, OE and WE inputs to avoid
bus contention. Reprogramming the AT49F008A(T)/8192A(T) is performed by first
erasing a block of data and then programming on a byte-by-byte or word-by-word
basis.
Pin Configurations
Pin Name
A0 - A18
CE
OE
WE
RESET
RDY/BUSY
I/O0 - I/O14
I/O15 (A-1)
BYTE
NC
Function
Addresses
Chip Enable
Output Enable
Write Enable
Reset
Ready/Busy Output
Data Inputs/Outputs
I/O15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)
Selects Byte or Word Mode
No Connect
AT49F008A
AT49F008AT
AT49F8192A
AT49F8192AT
Rev. 1199G–FLASH–11/02
1
Free Datasheet http://www.datasheetlist.com/

AT49F8192AT Datasheet
AT49F8192A(T) TSOP Top View
Type 1
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE
RESET
NC
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 A16
47 BYTE
46 GND
45 I/O15 / A-1
44 I/O7
43 I/O14
42 I/O6
41 I/O13
40 I/O5
39 I/O12
38 I/O4
37 VCC
36 I/O11
35 I/O3
34 I/O10
33 I/O2
32 I/O9
31 I/O1
30 I/O8
29 I/O0
28 OE
27 GND
26 CE
25 A0
AT49F8192A(T) SOIC (SOP) Top View
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
I/O0
I/O8
I/O1
I/O9
I/O2
I/O10
I/O3
I/O11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44 RESET
43 WE
42 A8
41 A9
40 A10
39 A11
38 A12
37 A13
36 A14
35 A15
34 A16
33 BYTE
32 GND
31 I/O15
30 I/O7
29 I/O14
28 I/O6
27 I/O13
26 I/O5
25 I/O12
24 I/O4
23 VCC
AT49F008A(T) TSOP Top View
Type 1
A16
A15
A14
A13
A12
A11
A9
A8
WE
RESET
NC
RDY/BUSY
A18
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 A17
39 GND
38 NC
37 A-1
36 A10
35 I/O7
34 I/O6
33 I/O5
32 I/O4
31 VCC
30 VCC
29 NC
28 I/O3
27 I/O2
26 I/O1
25 I/O0
24 OE
23 GND
22 CE
21 A0
Note:
“•” denotes a white dot marked on the package.
The device is erased by executing the Erase command sequence; the device internally con-
trols the erase operation. The memory is divided into four blocks for erase operations. There
are two 4K word parameter block sections: the boot block, and the main memory array block.
The typical number of program and erase cycles is in excess of 10,000 cycles.
The optional 8K word boot block section includes a reprogramming lockout feature to provide
data integrity. This feature is enabled by a command sequence. Once the boot block program-
ming lockout feature is enabled, the data in the boot block cannot be changed when input
levels of 5.5 volts or less are used. The boot sector is designed to contain user secure code.
For the AT49F8192A(T), the BYTE pin controls whether the device data I/O pins operate in
the byte or word configuration. If the BYTE pin is set at a logic “1” or left open, the device is in
word configuration, I/O0 - I/O15 are active and controlled by CE and OE.
If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins
I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-
stated and the I/O15 pin is used as an input for the LSB (A-1) address function.
2 AT49F008A(T)/8192A(T)
1199G–FLASH–11/02
Free Datasheet http://www.datasheetlist.com/


Features Datasheet pdf Features • Single-voltage Operation • • – 5V Read – 5V Programmin g Fast Read Access Time – 70 ns Inter nal Erase/Program Control Sector Archit ecture – One 8K Word (16K Bytes) Boot Block with Programming Lockout – Two 4K Word (8K Bytes) Parameter Blocks One 496K Word (992K Bytes) Main Memor y Array Block Fast Sector Erase Time 10 seconds Byte-by-byte or Word-by-wo rd Programming – 10 µs Typical Hardw are Data Protection Data Polling for En d of Program Detection Low Power Dissip ation – 50 mA Active Current – 100 µA CMOS Standby Current Typical 10,000 Write Cycles • • • • • • 8-megabit (1M x 8/ 512K x 16) Flash Me mory AT49F008A AT49F008AT AT49F8192A AT 49F8192AT Description The AT49F008A(T) and AT49F8192A(T) are 5-volt, 8-megabi t Flash memories organized as 1,048,576 words of 8 bits each or 512K words of 16 bits each. Manufactured with Atmel s advanced nonvolatile CMOS technology , the devices offer access times to 90 ns with power dissipation of just 275 mW. When deselected, the CMOS .
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