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SKY65120 Dataheets PDF



Part Number SKY65120
Manufacturers Skyworks Solutions
Logo Skyworks Solutions
Description WCDMA PA Bias Method
Datasheet SKY65120 DatasheetSKY65120 Datasheet (PDF)

application note SKY65120: WCDMA PA Bias Method For Lower Junction Temperature Introduction This application note describes how SKY65120 may be used with reduced bias control to obtain better thermal performance. It is especially useful for customers who may not have a suitable heat sink available directly below the PA module. To achieve high gain (>23 dB), the SKY65120 consists of two stages of amplification. The base current of each amplification stage is controlled by an on-die active bias c.

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application note SKY65120: WCDMA PA Bias Method For Lower Junction Temperature Introduction This application note describes how SKY65120 may be used with reduced bias control to obtain better thermal performance. It is especially useful for customers who may not have a suitable heat sink available directly below the PA module. To achieve high gain (>23 dB), the SKY65120 consists of two stages of amplification. The base current of each amplification stage is controlled by an on-die active bias circuit. Each active bias circuit has its own reference voltage supply, Vref1 and Vref2. The bias voltage (Vc_Bias) is shared by the two active bias circuits. This application note describes the active bias circuit used by SKY65120. The note explains the use of external supply voltages (Vc_Bias and Vref) and setting limits available to the customer. Test results of key parameters are also given over temperature. VREF1 (5 V) RREF1 VC_BIAS (5 V) VREF2 (5 V) RREF2 Active Bias Circuit Circuit Description The active circuit is designed to maintain a constant supply current to the base of its respective transistor as supply voltage and temperature is changed. Each active bias circuit consists of three HBT transistors and three resistors, connected as shown in Figure 2 below. VC_BIAS R1 Q1 Q2 R2 I_Supply (to Base of PA) Q3 R3 VREF RREF (On PCB) Active Bias 1 Active Bias 2 RF In Input Match Stage 1 VCC1 (5 V) Interstage Match Stage 2 VCC2 (5 V) Output Match RF Out Figure 2. Schematic Diagram of Active Bias Circuit Figure 1. Functional Diagram of SKY65120 PA Module Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com 201019 Rev. A • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • February 26, 2009 1 Free Datasheet http://www.nDatasheet.com Application Note • SKY65120: WCMDA PA Bias Method For Lower Junction Temperature Transistor Q3 is used as a thermal reference VT monitor, and is located on-die close to the amplifier transistor. This configuration allows stable PA module operation as the amplifier temperature changes. The main supply voltage to the bias circuits, Vc_Bias, should be set to 5 V, and is internally connected to both bias circuits. Reference voltages, Vref1 and Vref2 are made available to the user to allow PA ON/OFF switching; and a certain amount of gain and current control. When the Vref voltages are set to zero, Q1 and Q2 switches off, and effectively remove the supply current to the associated amplifier stage. Reference resistors, Rref1 and Rref2 (located on the customer PCB) can be used to trim the base reference current. Alternately, the Rref can be fixed and Vref voltages can be modified. For Vref1 = Vref2 = 5 V, the recommended values for these reference resistors are: Rref1 = 390 Ohms, Rref2 = 120 Ohms. J1 RF_IN 20 GND8 1 2 3 VC_BIAS C13 10 µF C1 3300 pF 4 5 6 19 GND7 18 NC5 17 GND6 16 15 14 13 12 11 C6 8.2 pF C7 3300 pF C8 10 µF VCC1 GND1 GND2 GND3 RF_IN N/C4 N/C3 SKY65120 VC_BIAS N/C1 RF_OUT VREF1 VREF2 VCC1 N/C2 VCC2 GND5 10 VREF1 VREF2 R2 120 Ω 7 8 GND4 C2 8.2 pF R1 390 Ω 9 C10 8.2 pF C11 1500 pF C12 10 µF VCC2 J2 RF_OUT C3 8.2 pF Figure 3. SKY65120 Evaluation Board Schematic Effect Of Reducing Vref The second stage transistor consumes the most current, whereas the first stage transistor has the most impact of overall gain. Therefore, to reduce junction temperature without severely impacting module gain, it is best to modify Vref2. Table 1 below presents the results of changing Vref2 from 4.0 V to 5.0 V. The results show maximum output power (for ACLR = -45 dBc) has only slight degradation (i.e. 0.2 dB), when Vref is reduced from 5.0 V to 4.0 V. However, the operating current is reduced by 77 mA, and case temperature is reduced from 73 °C to 61 °C. Note:  All measurements taken at 25 °C, with the heat-sink removed from the evaluation board. All other supply voltages fixed at 5 V. 2 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com February 26, 2009 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • 201019 Rev. A Free Datasheet http://www.nDatasheet.com Application Note • SKY65120: WCMDA PA Bias Method For Lower Junction Temperature Table 1: Maximum Pout, Gain, Icc and Case Temperature vs. Vref2 VREF2 (V) 5.0 4.8 4.5 4.3 4.0 PIN (dBm) 1.95 1.75 1.55 1.45 1.25 POUT (dBm) 24.8 24.8 24.8 24.75 24.6 Gain (dB) 22.85 23.05 23.25 23.3 23.35 ICC (mA) 554 527 515 504 477 Case Temp (°C) 72.8 71.6 69.8 64.1 61.0 Measured Junction Temperature IR-scans were conducted on devices with case temperature set to 85 °C, with various combinations of Vref1 and Vref2. At each setting, output power was adjusted to 21 dBm. Table 2 shows the measured maximum junction temperature at each Vref1 and Vref2 combination. The tempera.


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