3.0V Core Async/Page PSRAM
IS66WVE2M16DBLL IS67WVE2M16DBLL
3.0V Core Async/Page PSRAM
Overview The IS66WVE2M16DBLL and IS67WVE2M16DBLL is an integ...
Description
IS66WVE2M16DBLL IS67WVE2M16DBLL
3.0V Core Async/Page PSRAM
Overview The IS66WVE2M16DBLL and IS67WVE2M16DBLL is an integrated memory device containing 32Mbit Pseudo Static Random Access Memory using a self-refresh DRAM array organized as 2M words by 16 bits. The device includes several power saving modes : Partial Array Refresh mode where data is retained in a portion of the array and Deep Power Down mode. Both these modes reduce standby current drain. The die has separate power rails, VDDQ and VSSQ for the I/O to be run from a separate power supply from the device core.
Features Asynchronous and page mode interface Dual voltage rails for optional performance VDD 2.7V~3.6V, VDDQ 2.7V~3.6V Page mode read access Interpage Read access : 70ns Intrapage Read access : 20ns Low Power Consumption Asynchronous Operation < 30 mA Intrapage Read < 18mA Standby < 150 uA (max.) Deep power-down (DPD) < 3uA (Typ) Low Power Feature Temperature Controlled Refresh Partial Array Refresh Deep power-down (DPD) mode Operating temperature Range Industrial: -40°C~85°C Automotive A1: -40°C~85°C Package: 48-ball TFBGA
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