Triple 3-Input AND Gate
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
MC74HC11A
Triple 3-Input AND Gate High–Performance Silicon...
Description
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
MC74HC11A
Triple 3-Input AND Gate High–Performance Silicon–Gate CMOS
The MC74HC11A is identical in pinout to the LS11. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 60 FETs or 15 Equivalent Gates LOGIC DIAGRAM
1 A1 2 B1 13 C1 3 A2 4 B2 5 C2 9 A3 10 B3 11 C3 PIN 14 = VCC PIN 7 = GND
14 1
N SUFFIX PLASTIC PACKAGE CASE 646–06
14 1
D SUFFIX SOIC PACKAGE CASE 751A–03
14 1
DT SUFFIX TSSOP PACKAGE CASE 948G–01
ORDERING INFORMATION MC74HCXXAN MC74HCXXAD MC74HCXXADT Plastic SOIC TSSOP
12
Y1
6
Y2
Y = ABC
PIN ASSIGNMENT
A1 B1 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC C1 Y1 C3 B3 A3 Y3
8
Y3
A2 B2 C2 Y2 GND
FUNCTION TABLE
Inputs A L X X H B X L X H C X X L H Output Y L L L H
This document contains information on a new product. Specifications and information herein are subject to change without notice. 12/97
© Motorola, Inc. 1997
Downloaded from Elcodis.com electronic components distributor
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