Document
ESD8004
ESD Protection Diode
Low Capacitance Array for High Speed Data Lines
The ESD8004 is designed to protect high speed data lines from ESD. Ultra−low capacitance and low ESD clamping voltage make this device an ideal solution for protecting voltage sensitive high speed data lines. The flow−through style package allows for easy PCB layout and matched trace lengths necessary to maintain consistent impedance between high speed differential lines such as USB 3.0/3.1.
Features
• Low Capacitance (0.35 pF Max, I/O to GND) • Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4)
• Low ESD Clamping Voltage • SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
• USB 3.0/3.1 • eSATA • DisplayPort
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Operating Junction Temperature Range TJ −55 to +125 °C
Storage Temperature Range
Tstg − 55 to +150 °C
Lead Solder Temperature − Maximum (10 Seconds)
TL 260 °C
IEC 61000−4−2 Contact (ESD) IEC 61000−4−2 Air (ESD)
ESD ESD
±15 kV ±15 kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
=
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UDFN10 CASE 517BB
MARKING DIAGRAM
4DMG G
4D = Specific Device Code (tbd) M = Date Code G = Pb−Free Package (Note: Microdot may be in either location)
PIN CONFIGURATION AND SCHEMATIC
N/C N/C GND N/C N/C 10 9 8 7 6
12 3 4 5 I/O I/O GND I/O I/O
I/O I/O I/O I/O Pin 1 Pin 2 Pin 4 Pin 5
Pins 3, 8 Note: Common GND − Only Minimum of 1 GND connection required
© Semiconductor Components Industries, LLC, 2015
February, 2015 − Rev. 5
ORDERING INFORMATION
Device
Package
Shipping
ESD8004MUTAG SZESD8004MUTAG
UDFN10 (Pb−Free)
UDFN10 (Pb−Free)
3000 / Tape & Reel
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
1 Publication Order Number: ESD8004/D
ESD8004
See Application Note AND8308/D for further description of survivability specs.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Parameter
VRWM IR VBR IT
VHOLD IHOLD
Working Peak Voltage Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Holding Reverse Voltage Holding Reverse Current
RDYN IPP VC
Dynamic Resistance Maximum Peak Pulse Current Clamping Voltage @ IPP VC = VHOLD + (IPP * RDYN)
I IPP
RDYN
VBR
VCVRWMVHOLD
IR IT IHOLD
VC
RDYN −IPP
VC = VHOLD + (IPP * RDYN)
V
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Parameter
Symbol
Conditions
Min Typ Max Unit
Reverse Working Voltage Breakdown Voltage Reverse Leakage Current Holding Reverse Voltage Holding Reverse Current Clamping Voltage (Note 1) Clamping Voltage TLP (Note 2) See Figures 5 through 8
VRWM VBR IR VHOLD IHOLD VC VC
I/O Pin to GND
IT = 1 mA, I/O Pin to GND VRWM = 3.3 V, I/O Pin to GND I/O Pin to GND
I/O Pin to GND
IEC61000−4−2, ±8 KV Contact
IPP = 8 A IPP = −8 A IPP = 16 A IPP = −16 A
IEC 61000−4−2 Level 2 equivalent (±4 kV Contact, ±4 kV Air) IEC 61000−4−2 Level 4 equivalent (±8 kV Contact, ±15 kV Air)
3.3 5.5 7.0
1.0 1.19 25 See Figures 1 and 2 4.9 −4.5
8.0 −8.0
V V mA V mA V V
Dynamic Resistance
RDYN
I/O Pin to GND GND to I/O Pin
0.40 W 0.45
Junction Capacitance (See Figures 9 & 10)
CJ
VVRR
= =
0 0
V, V,
f f
= =
1 MHz between I/O Pins and GND 2.5 GHz between I/O Pins and GND
VR = 0 V, f = 1 MHz, between I/O Pins
0.30 0.35 pF 0.25 0.30 0.15 0.20
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. For test procedure see Figures 3 and 4 and application note AND8307/D. 2. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.
90 10
80 0
70 60 50 40 30 20 10
0 −10
−20 0 20 40 60 80 100 120 140 TIME (ns)
Figure 1. IEC61000−4−2 +8 kV Contact ESD Clamping Voltage
−10 −20 −30 −40 −50 −60 −70 −80 −90
−20
0 20 40 60 80 100 120
TIME (ns) Figure 2. IEC61000−4−2 −8 kV Contact
Clamping Voltage
140
VOLTAGE (V) VOLTAGE (V)
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ESD8004
IEC 61000−4−2 Spec.
Level
Test Voltage (kV)
First Peak Current (A)
Current at 30 ns (A)
1 2 7.5 4
2 4 15 8
3 6 22.5 12
48
30 16
Current at 60 ns (A)
2
4 6
8
IEC61000−4−2 Waveform Ipeak 100% 90%
I @ 30 ns
I @ 60 ns
ESD Gun
10%
TVS
Figure 3. IEC61000−4−2 Spec
Oscilloscope
tP = 0.7 ns to 1 ns
50 W Cable
50 W
Figure 4. Diagram of.