AD9656

Data Sheet FEATURES SNR = 79.9 dBFS at 16 MHz (VREF = 1.4 V) SNR = 78.1 dBFS at 64 MHz (VREF = 1.4 V) SFDR = 86 dBc to Nyquist (VREF = 1.4 V) JESD204B Subclass 1 coded serial digital outputs Flexible analog input range: 2.0 V p-p to 2.8 V p-p 1.8 V supply operation Low power: 197 mW per channel at 125 MSPS (two lanes) DNL = ±0.6 LSB (VREF = 1.4 V) INL = ±4.5 LSB (VREF = 1.4 V) 650 MHz analog input bandwidth, full power Serial port control Full chip and individual channel power-down modes Built-in and custom digital test pattern generation Multichip sync and clock divider Standby mode Quad, 16-Bit, 125 MSPS, JESD204B 1.8 V Analog-to-Digital Converter AD9656 FUNCTIONAL BLOCK DIAGRAM AVDD PDWN 16 DVDD DRVDD VINA+ VINA– VINB+ VINB– RBIAS VREF SENSE REF SELECT AGND VINC+ VINC– VIND+ VIND– PIPELINE ADC 16 PIPELINE ADC PIPELINE ADC JESD204B INTERFACE CML TX OUTPUTS SERDOUT0+ SERDOUT0– SERDOUT1+ SERDOUT1– SERDOUT2+ SERDOUT2– SERDOUT3+ SERDOUT3– DSYNC+ DSYNC– 16 1V TO 1.4V HIGH SPEED SERIALIZERS PIPELINE ADC SERIAL PORT INTERFACE 16 CONTROL REGISTERS VCM CLOCK MANAGEMENT DSYSREF+/ DSYSREF– SYNC CLK+/ CLK– AD9656 DVSS Medical imaging High speed imaging Quadrature radio receivers Diversity radio receivers Portable test equipment CSB SDIO SCLK SVDD APPLICATIONS Figure 1. GENERAL DESCRIPTION The AD9656 is a quad, 16-bit, 125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The devic...