LCD Controller. TSU16AK Datasheet

TSU16AK Datasheet PDF, Equivalent


Part Number

TSU16AK

Description

SXGA LCD Controller

Manufacture

Mstar

Total Page 30 Pages
PDF Download
Download TSU16AK Datasheet PDF


TSU16AK Datasheet
TSU16AK
SXGA LCD Controller with Analog Interface and Dual LVDS Transmitter
Preliminary Data Sheet Version 0.3
FEATURES
n Input Port
Ÿ RGB analog input port
Ÿ Full SOG and composite sync support,
including copy protected signals
Ÿ High-speed 8-bit triple-ADC with low jitter PLL
operates up to 220 MHz
n Display Processing Engine
Ÿ Patent-pending Hybrid Image Resolution
Converter
Ÿ Variable sharpness control
Ÿ Interlaced to progressive conversion
Ÿ Patent-pending Dynamic Frame-Rate generator
(DFR) short line storage frame extension
technique eliminates short lines in output
frames
Ÿ Media Window Enhancement (MWE)Note
Ÿ Peaking and coring functions for sharpness
enhancement and noise reduction
Ÿ Brightness and contrast control
Ÿ Programmable 10-bit gamma correction
Ÿ sRGB support
n Auto-Detection / Auto-Tune Support
Ÿ Auto input signal format (SOG, composite,
separated HSYNC, and VSYNC)
Ÿ Input mode detection support analyzes input
video signal (H/V polarity, H/V frequency,
interlace/field detect) extensive status
registers support robust detection of all VESA
and IBM modes
Ÿ Auto-tuning function including support for
phase selection, image position, offset & gain
and jitter detection
Ÿ Smart screen-fitting
n On-screen display controller (OSD)
Ÿ Built-in OSD generator with 291 character font
programmable RAM
Ÿ Internal OSD rotation degree of 90 and 270
Ÿ Supports 2/4/8 multi-color fonts
Ÿ Supports 8/16/256 color palette
Ÿ Supports 1K code attributes
Ÿ Gradient color function
Ÿ Hardware button animation function
Ÿ Pattern generator for production test
Ÿ Supports OSD MUX and alpha blending
capability
n Output Display Interface
Ÿ Supports 6/8-bit LVDS panel interface
Ÿ Supports up to SXGA display resolution with up
to 135 MHz dot clock
Ÿ Spread spectrum output frequency for EMI
suppression
Ÿ PWM backlight intensity control
n DPMS Support
Ÿ Full green mode DPMS support
Ÿ Low standby power (< 16mA)
n External Connection/Component
Ÿ Supports DDR direct bus (up to 40MHz) and
serial bus (up to 400Kbit/sec)
Note:
The optional MWE function is available with TSU16AWK.
Version 0.3
-1-
Copyright © 2004 MStar Semiconductor, Inc. All rights reserved.
10/1/2004
Free Datasheet http://www.Datasheet4U.com

TSU16AK Datasheet
TSU16AK
SXGA LCD Controller with Analog Interface and Dual LVDS Transmitter
Preliminary Data Sheet Version 0.3
BLOCK DIAGRAM
Analog RGB
Analog
HSYNC/VSYNC
Analog
Interface
Engine
Display
Processing
Engine
HOST
OSD
Clock
Gen
LVDS
Panel
Interface
To Panel
interface
MCU
XTAL/EXT CLK
GENERAL DESCRIPTION
The TSU16AK is total solution graphics processing IC for LCD monitors with panel resolutions up to SXGA. It is
configured with a high-speed integrated triple-ADC/PLL, a high quality display processing engine, and an integrated
output display interface that can support LVDS panel interface format. To further reduce system costs, the
TSU16AK also integrates intelligent power management control capability for green-mode requirements and
spread-spectrum support for EMI management.
The TSU16AK incorporates the worlds first coherent oversampled RGB graphics ADC in a monitor controller
system1. The oversampling ADC samples the input RGB signals at a frequency that is much higher than the signal
source pixel rate. This can preserve details in the video signal that ordinarily would be lost due to input signal jitter
or bandwidth limitations in non-oversampled systems.
The TSU16AK also incorporates a new Dynamic Frame Rate (DFR) generator2 for the digital output video to the
display panel that preserves the advantages of a fixed output clock rate, while eliminating the output end of frame
short-line.
1,2 Patent Pending
Version 0.3
-2-
Copyright © 2004 MStar Semiconductor, Inc. All rights reserved.
10/1/2004
FreeDatasheethttp://www.Datasheet4U.com


Features Datasheet pdf TSU16AK SXGA LCD Controller with Analog Interface and Dual LVDS Transmitter Pre liminary Data Sheet Version 0.3 FEATUR ES Input Port Ÿ RGB analog input port Ÿ Full SOG and composite sync support, including copy protected signals Ÿ Hi gh-speed 8-bit triple-ADC with low jitt er PLL operates up to 220 MHz n Display Processing Engine Ÿ Patent-pending Hy brid Image Resolution Converter Ÿ Vari able sharpness control Ÿ Interlaced to progressive conversion Ÿ Patent-pendi ng Dynamic Frame-Rate generator (DFR) short line storage frame extension t echnique eliminates short lines in outp ut frames Ÿ Media Window Enhancement ( MWE)Note Ÿ Peaking and coring function s for sharpness enhancement and noise r eduction Ÿ Brightness and contrast con trol Ÿ Programmable 10-bit gamma corre ction Ÿ sRGB support n Auto-Detection / Auto-Tune Support Ÿ Auto input signa l format (SOG, composite, separated HSY NC, and VSYNC) Ÿ Input mode detection support analyzes input video signal (H/V polarity, H/V frequency, interlace/fie.
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