SUPPLY SUPERVISOR. HY510N Datasheet

HY510N SUPERVISOR. Datasheet pdf. Equivalent

HY510N Datasheet
Recommendation HY510N Datasheet
Part HY510N
Description PC POWER SUPPLY SUPERVISOR
Feature HY510N; ¯E¶§¦³--¤½¥q ` HY510N PC POWER SUPPLY SUPERVISOR Data Sheet REV. 1.30 September 21, 2004 The inf.
Manufacture HawYang
Datasheet
Download HY510N Datasheet




HawYang HY510N
`
HY510N
PC POWER SUPPLY SUPERVISOR
Data Sheet
REV. 1.30
September 21, 2004
The information in this document is subject to change without notice.
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TEL:886-2-23775117 FAX:886-2-23773189
Email:salesdep@hawyang.com.tw
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HawYang HY510N
HY510N
Rev. 1.30
GENERAL DESCRIPTION
The HY510N provides protection circuits, power good output (PGO), fault protection latch (FPL_N),
and a protection detector function (PDON_N) control. It can minimize external components of switching
power supply systems in personal computer.
The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. The Under Voltage
Detector (UVD) monitors 3.3V, 5V input voltage level. When OVD or UVD detect the fault voltage level,
the FPL_N is latched HIGH and PGO go low. The latch can be reset by PDON_N goo HIGH. There is
2.4 ms delay time for PDON_N turn off FPL_N.
When OVD and UVD detect the right voltage level, the power good output (PGO) will be issue.
FEATURES
The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level.
The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level.
Both of the power good output (PGO) and fault protection latch (FPL_N) are Open Drain Output.
75 ms time delay for UVD.
300 ms time delay for PGO.
38 ms for PDON_N input signal De–bounce.
73 us for internal signal De–glitches.
2.4 ms time delay for PDON_N turn-off FPL_N.
ESD voltage up to 4000V as tested under MIL–STD–883D, Method 3015.7.
PIN ASSIGNMENT AND PACKAGE TYPE
PGI
GND
FPL_N
PDON_N
1
2
3
4
8 PGO
7 VCC
6 V5
5 V33
ORDERING INFORMATION
PACKAGE
8–Pin Plastic DIP
HY510N–N080WT
Lead–Free Pb
HY510N–N080WT Pb
The Top-Side Marking would be added a dot
8–Pin Plastic SOP
HY510N–S080WT
HY510N–S080WT Pb
in the right side for lead-free package.
PIN DESCRIPTION
Pin No. Pin Name TYPE
Description
1 PGI
I power good input pin
2 GND
P Ground
3 FPL_N
O fault protection latch output pin(open drain output)
4 PDON_N I protection detector function ON/OFF control input pin
5 V33
I 3.3V input pin
6 V5
I 5V input pin
7 VCC
I Supply voltage / 12V input pin
8 PGO
O power good output pin(open drain output)
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HawYang HY510N
HY510N
Rev. 1.30
FUNCTION TABLE
PGI
< 0.95V
< 0.95V
< 0.95V
0.95 < PGI < 1.2
0.95 < PGI < 1.2
0.95 < PGI < 1.2
PGI > 1.2
PGI > 1.2
PGI > 1.2
x
x = don’t care
PDON_N
L
L
L
L
L
L
L
L
L
H
UV
no
no
yes
no
no
yes
no
no
yes
x
OV FPL_N
no L
yes H
no L
no L
yes H
no H
no L
yes H
no H
xH
BLOCK DIAGRAM
EN0158A_WT7510 BLOCK DIAGRAM
VCC
150uA
Power On Reset POR
LVRST
VCC Low Voltage
Clock
Generator
CLK
PWR
3.6V
PDON_N
V33
V5
VCC
PGI
CLK PWR
38ms
debounce
-
+
UN
-
+
OV
-
+
UN
-
+
OV
-
+
OV
-
+
UN
1.2V
+
-
0.95V
RST
CLK
2.4ms
clr
delay
CLK PWR
75 ms
clr
delay
PWR
CLK RST
73us
debounce
R
SQ
CLK RST
73us
debounce
CLK
300ms
clr
delay
PGO
L
L
L
L
L
L
H
L
L
L
FPL_N
VCC
PGO
Page 3
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