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LAPIS Semiconductor ML9058E
132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays
FEDL9058E-01
Issue Date: April. 13, 2007
GENERAL DESCRIPTION
The ML9058E is an LSI for dot matrix graphic LCD devices carrying out bit map display. This LSI can drive a dot matrix g raphic LCD di splay panel un der t he con trol of an 8- bit microcomputer (h ereinafter des cribed MPU ). Since all the functions necessary for driving a bit map type LCD device are incorporated in a single chip, using the ML9058E makes it possible to realize a bit map type dot matrix graphic LCD display system with only a few chips. Since the bit map method in which one bit of display RAM data turns ON or OFF one dot in the display panel, it is possible to carry out displays with a high degree of freedom such as Chinese character displays, etc. With one chip, it is possible to construct a graphic display system with a maximum of 65 132 dots. The display can be expanded further using two chips. However, the ML9058E is not used in a multiple chip configuration when a line reversal drive is set. The ML9058E is made using a CMOS process. Because it has a built-in RAM, low power consumption is one of its features, and is therefore suitable for displays in battery-operated portable equipment. The ML9058E has 65 common signal outputs and 132 segment signal outputs and one chip can drive a display of up to 65 132 dots.
FEATURES
Direct display of the RAM data using the bit map method Display RAM data “1” ... Dot is displayed Display RAM data “0” ... Dot is not displayed (during forward display) Dis play RAM capacity 65 132 = 8580 bits LCD Drive circuits 65 common outputs, 132 segment outputs MPU interface: Can select an 8-bit parallel or serial interface Built-in voltage multiplier circuit for the LCD drive power supply Built-in LCD drive voltage adjustment circuit Built-in LCD drive bias generator circuit Can select frame reversal drive or line reversal drive by command Built-in oscillator circuit (Internal RC oscillator/external clock input) A variety of commands Read/write o f d isplay d ata, d isplay O N/OFF, f orward/reverse d isplay, all d ots O N/all dots OFF, set p age address, set display start address, etc. P ower supply voltage Logic power supply: VDD-VSS = 3.7 V to 5.5 V Voltage multiplier reference voltage: VIN-VSS = 3.7 V to 5.5 V (2- to 4-time multiplier available) LCD Drive voltage: VBI-VSS = 6.0 to 18 V Package: Gold bump chip (Bump hardness: Low, DV) : Gold bump chip (Bump hardness: High, CV) This device is not resistant to radiation and light.
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FEDL9058E-01
LAPIS Semiconductor
ML9058E
BLOCK DIAGRAM
SEG131 COMS0 Display timing generator circuit COMS1 COM63 COM0 SEG0 VDD V1 V2 V3 V4 V5 VSS
Common Output state selection circuit
SEGMENT Drivers
COMMON Drivers
VS1– VS2– Page address circuit VC3+ Power supply circuit VC4+ VC5+ VC6+ VOUT VIN VR VRS IRS
Display data latch circuit
COMS
FRS FR C.