SYNCHRONOUS DYNAMIC RAM
IS42S16400J IS45S16400J
1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
FEBRUARY 2022
FEATURES
• Cloc...
Description
IS42S16400J IS45S16400J
1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
FEBRUARY 2022
FEATURES
Clock frequency: 200, 166, 143, 133 MHz
Fully synchronous; all signals referenced to a positive clock edge
Internal bank for hiding row access/precharge
Single 3.3V power supply
LVTTL interface
Programmable burst length – (1, 2, 4, 8, full page)
Programmable burst sequence: Sequential/Interleave
Self refresh modes
Auto refresh (CBR)
4096 refresh cycles every 64 ms (Com, Ind, A1 grade) or 16ms (A2 grade)
Random column address every clock cycle Programmable CAS latency (2, 3 clocks)
Burst read/write and burst read/single write operations capability
Burst termination by burst stop and precharge command
OPTIONS
Package: 54-pin TSOP II 54-ball TF-BGA (8mm x 8mm) 60-ball TF-BGA (10.1mm x 6.4mm)
Operating Temperature Range Commercial (0oC to +70oC) Industrial (-40oC to +85oC) Automotive Grade A1 (-40oC to +85oC) Automotive Grade A2 (-40oC to +105oC)
OVERVIEW
ISSI's 64Mb Synchronous DRAM is organized as 1,048,576
bits x 16-bit x 4-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.
KEY TIMING PARAMETERS
Parameter
-5
-6 -7 Unit
Clk Cycle Time CAS Latency = 3 CAS Latency = 2
5
6
7 ns
7.5
7.5 7.5 ns
Clk Frequency CAS Latency = 3 CAS Latency = 2
200 166 143 Mhz 133 133 133 Mhz
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