RT9173C
Cost-Effective, 2A Sink/Source Bus Termination Regulator
General D escription
The RT9173C is a si mple, cost-eff...
RT9173C
Cost-Effective, 2A Sink/Source Bus Termination
Regulator
General D escription
The RT9173C is a si mple, cost-effective and high-speed linear
regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 a nd SSTL_18 or other spe cific interfaces such a s HSTL, SCSI-2 a nd SCSI-3 etc. device s requirements. The
regulator is ca pable of a ctively sinking or sourcing up to 2Awhile regulating a n output voltage to within 40mV . The output termin ation voltage ca b be tightly regulated to tra ck 1/2VDDQ by two extern al voltage divider resistors or the de sired output voltage ca n be pro-gra mmed by externally forcing the REFEN pin voltage. The RT9173C also incorporates a high-speed differential amplifier to provide ultra-fa st response in line/loa d tra nsient. Other features include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down prote ction. The RT9173C are available in the SOP-8 (Exposed Pad) surface mount pa ckages.
Features
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Ideal for DDR-I, DDR-II and DDR-III V TT Applications Sink and Source 2A Continuous Current Integrated Power MOSFETs Generates Termination Voltage for SSTL_2, SSTL _18, HSTL, SCSI-2 and SCSI-3 Interfaces High Accuracy Output Voltage at Full-Load Output Adjustment by T wo External Resistors Low External Component Count Shutdown for Suspend to RAM (STR) Functionality with High-Imp...