MC74HC133

MOTOROLA SEMICONDUCTOR TECHNICAL DATA 13-Input NAND Gate High–Performance Silicon–Gate CMOS The MC74HC133 is identical in pinout to the LS133. The device inputs are compatible w ith s tandard C MOS o utputs; w ith p ullup r esistors, t hey a re compatible with LSTTL outputs. This NAND gate features 13 inputs which surpasses most random logic requirements. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 68 FETs or 17 Equivalent Gates 16 MC74HC133 N SUFFIX PLASTIC PACKAGE CASE 648–08 1 16 1 D SUFFIX SOIC PACKAGE CASE 751B–05 ORDERING INFORMATION MC74HCXXXN MC74HCXXXD Plastic SOIC PIN ASSIGNMENT LOGIC DIAGRAM 1 2 3 4 5 6 7 10 11 12 13 14 15 PIN 16 = VCC PIN 8 = GND Inputs A through M All inputs H All other combinations 9 Y A B C D E F G GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC M L K J I H Y A B C D E F G H I J K L M Y = ABCDEFGHIJKLM FUNCTION TABLE Output Y L H 10/95 © Motorola, Inc. 1995 1 REV 6 http://www.Datasheet4U.com ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ Î...