Trench MOSFET. FDMC6296 Datasheet

FDMC6296 Datasheet PDF, Equivalent


Part Number

FDMC6296

Description

Single N-Channel Logic-Level Power Trench MOSFET

Manufacture

Fairchild Semiconductor

Total Page 7 Pages
PDF Download
Download FDMC6296 Datasheet


FDMC6296 Datasheet
FDMC6296
November 2010
Single N-Channel Logic-Level Power Trench® MOSFET
30 V, 11.5 A, 10.5 mΩ
Features
General Description
„ Max rDS(on) = 10.5 mΩ at VGS = 10 V, ID = 11.5 A
„ Max rDS(on) = 15 mΩ at VGS = 4.5 V, ID = 10 A
„ Low Qg, Qgd and Rg for efficient switching performance
„ RoHS Compliant
This single N-Channel MOSFET in the thermally efficient
MicroFET Package has been specifically designed to perform
well in Point of Load converters. Providing an optimized balance
between rDS(on) and gate charge this device can be effectively
used as a “high side” control swtich or “low side” synchronous
rectifier.
Application
„ Point of Load Converters
„ 1/16 Brick Synchronous Rectifier
Top Bottom
Pin 1
S SG
S
MLP 3.3X3.3
DD
D
D
D5
D6
D7
D8
4G
3S
2S
1S
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Pulsed
TA = 25 °C
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
Ratings
30
±20
11.5
40
2.1
0.9
-55 to +150
Units
V
V
A
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1)
(Note 1a)
3
53
°C/W
Device Marking
FDMC6296
Device
FDMC6296
Package
MLP 3.3X3.3
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2010 Fairchild Semiconductor Corporation
FDMC6296 Rev. C2
1
www.fairchildsemi.com
http://www.Datasheet4U.com

FDMC6296 Datasheet
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = 250 μA, VGS = 0 V
ID = 250 μA, referenced to 25 °C
VDS = 24 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
30 V
26 mV/°C
1
±100
μA
nA
On Characteristics
VGS(th)
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = 250 μA1
ID = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 11.5 A
VGS = 4.5 V, ID = 10 A
VGS = 10 V, ID = 11.5 A, TJ = 125 °C
VDD = 5 V, ID = 11.5 A
1.8 3 V
-6 mV/°C
8.7 10.5
10.6 15 mΩ
13 17
49 S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VDS = 15 V, VGS = 0 V,
f = 1 MHz
VGS = 0 V, f = 1 MHz
1610
406
150
0.9
2141
540
225
pF
pF
pF
Ω
Switching Characteristics
td(on)
tr
td(off)
tf
Qg(TOT)
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge at 5V
Total Gate Charge
Gate to Drain “Miller” Charge
VDD = 15 V, ID = 1.0 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 5 V
VDD = 15 V,
ID = 11.5 A
10 20 ns
31 0 ns
27 43 ns
81 6 ns
14 19 nC
4n C
4 nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage VGS = 0 V, IS = 2 A
(Note 2)
0.7 1.2 V
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = 11.5 A, di/dt = 100 A/μs
30
22
ns
nC
Notes:
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 53 °C/W when mounted on a
1 in2 pad of 2 oz copper
b. 125 ° C/W wh en mo unted on
a minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
©2010 Fairchild Semiconductor Corporation
FDMC6296 Rev. C2
2
www.fairchildsemi.com


Features Datasheet pdf FDMC6296 N-Channel Power Trench® MOSFET FDMC6296 Single N-Channel Logic-Level Power Trench® MOSFET 30 V, 11.5 A, 10 .5 mΩ Features „ Max rDS(on) = 10.5 m Ω at VGS = 10 V, ID = 11.5 A „ Max rD S(on) = 15 mΩ at VGS = 4.5 V, ID = 10 A „ Low Qg, Qgd and Rg for efficient s witching performance „ RoHS Compliant November 2010 General Description Thi s single N-Channel MOSFET in the therma lly efficient MicroFET Package has been specifically designed to perform well in Point of Load converters. Providing an optimized balance between rDS(on) an d gate charge this device can be effect ively used as a “high side” control swtich or “low side” synchronous r ectifier. Application „ Point of Load Converters „ 1/16 Brick Synchronous R ectifier Top Pin 1 S S S G Bottom D D D D D D D D 8 1 S 5 6 7 4 3 2 G S S M LP 3.3X3.3 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol V DS VGS ID PD TJ, TSTG Parameter Drain t o Source Voltage Gate to Source Voltage Drain Current Power Dissipation Power Dissi.
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