Philips Semiconductors
Product specification
TrenchMOS transistor Logic level FET
GENERAL DESCRIPTION
N-channel enhan...
Philips Semiconductors
Product specification
TrenchMOS
transistor Logic level FET
GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power
transistor in a plastic envelope available in TO220AB and SOT404 . Using ’trench’ technology which features very low on-state resistance. It is intended for use in automotive and general purpose switching applications.
BUK9508-55A BUK9608-55A
QUICK REFERENCE DATA
SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 5 V V GS = 10 V MAX. 55 75 200 175 8 7.3 UNIT V A W ˚C mΩ mΩ
PINNING TO220AB & SOT404
PIN 1 2 3 DESCRIPTION gate drain source
ww re .nu at an e ce. 8 com Tr ia
PIN CONFIGURATION
mb tab
SYMBOL
2
1
3
12
3
tab/mb drain
SOT404
TO220AB
LIMITING VALUES
SYMBOL VDS VDGR ±VGS ±VGSM
Limiting values in accordance with the Absolute Maximum System (IEC 134) PARAMETER CONDITIONS RGS = 20 kΩ tp≤50µS Drain-source voltage Drain-gate voltage Gate-source voltage Non-repetitive gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature
F w C
l
d g s
MIN. -5 -
MAX. 55 5 10 15 75 65 400 200 175
UNIT V V V V A A A W ˚C
PD
ID ID IDM Ptot Tstg, Tj
Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C -
- 55
THERMAL RESISTANCES
SYMBOL Rth j-mb Rth j-a Rth j-a PARAMETER Thermal resistance junction to mounting base Ther...