High Performance E2CMOS PLD Generic Array Logic
GAL26CV12
High Performance E2CMOS PLD Generic Array Logic™ Features
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 7.5 ns Maxim...
Description
GAL26CV12
High Performance E2CMOS PLD Generic Array Logic™ Features
HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 142.8 MHz — 4.5ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs — UltraMOS® Advanced CMOS Technology ACTIVE PULL-UPS ON ALL PINS LOW POWER CMOS — 90 mA Typical Icc E2 CELL TECHNOLOGY — Reconfigurable Logic — Reprogrammable Cells — 100% Tested/100% Yields — High Speed Electrical Erasure (<100ms) — 20 Year Data Retention TWELVE OUTPUT LOGIC MACROCELLS — Uses Standard 22V10 Macrocells — Maximum Flexibility for Complex Logic Designs PRELOAD AND POWER-ON RESET OF REGISTERS — 100% Functional Testability APPLICATIONS INCLUDE: — DMA Control — State Machine Control — High Speed Graphics Processing — Standard Logic Speed Upgrade ELECTRONIC SIGNATURE FOR IDENTIFICATION
Functional Block Diagram
I/CLK
RESET
INPUT 8
I 8 I 8 I 8 I
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
PROGRAMMABLE AND-ARRAY (122X52)
OLMC
I/O/Q
10
OLMC
I/O/Q
I
12
OLMC
I/O/Q
I
12
OLMC
I/O/Q
I
10
OLMC
I/O/Q
I 8 I 8 I 8 I 8 I
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
I/O/Q
OLMC
PRESET
I/O/Q
Description
The GAL26CV12, at 7.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance 28-pin PLD available on the market. E2 technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the...
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