Thumb-based Microcontrollers. AT91SAM9G45 Datasheet

AT91SAM9G45 Datasheet PDF, Equivalent


Part Number

AT91SAM9G45

Description

AT91 ARM Thumb-based Microcontrollers

Manufacture

ATMEL Corporation

Total Page 30 Pages
PDF Download
Download AT91SAM9G45 Datasheet


AT91SAM9G45 Datasheet
Features
400 MHz ARM926EJ-S™ ARM® Thumb® Processor
– 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU
Memories
– Dual External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR,
Static Memories, CompactFlash, SLC NAND Flash with ECC
– One 64-kbyte internal SRAM, single-cycle access at system speed or processor
speed through TCM interface
– One 64-kbyte internal ROM, embedding bootstrap routine
Peripherals
– LCD Controller supporting STN and TFT displays up to 1280*860
– ITU-R BT. 601/656 Image Sensor Interface
– USB Device High Speed, USB Host High Speed and USB Host Full Speed with On-
Chip Transceiver
– 10/100 Mbps Ethernet MAC Controller
– Two High Speed Memory Card Hosts (SDIO, SDCard, MMC)
– AC'97 controller
– Two Master/Slave Serial Peripheral Interfaces
– Two Three-channel 32-bit Timer/Counters
– Two Synchronous Serial Controllers (I2S mode)
– Four-channel 16-bit PWM Controller
– Two Two-wire Interfaces
– Four USARTs with ISO7816, IrDA, Manchester and SPI modes
– 8-channel 10-bit ADC with 4-wire Touch Screen support
System
– 133 MHz twelve 32-bit layer AHB Bus Matrix
– 37 DMA Channels
– Boot from NAND Flash, SDCard, DataFlash® or serial DataFlash
– Reset Controller with on-chip Power-on Reset
– Selectable 32768 Hz Low-power and 12 MHz Crystal Oscillators
– Internal Low-power 32 kHz RC Oscillator
– One PLL for the system and one 480 MHz PLL optimized for USB High Speed
– Two Programmable External Clock Signals
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer, Real Time Timer and Real Time Clock
I/O
– Five 32-bit Parallel Input/Output Controllers
– 160 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os with
Schmitt trigger input
Package
– 324-ball LFBGA, pitch 0.8 mm
AT91 ARM
Thumb-based
Microcontrollers
AT91SAM9G45
Preliminary
6438B–ATARM–29-Jul-09

AT91SAM9G45 Datasheet
1. Description
The ARM926EJ-S based AT91SAM9G45 features the frequently demanded combination of user
interface functionality and high data rate connectivity, including LCD Controller, resistive touch-
screen, camera interface, audio, Ethernet 10/100 and high speed USB and SDIO. With the pro-
cessor running at 400MHz and multiple 100+ Mbps data rate peripherals, the AT91SAM9G45
has the performance and bandwidth to the network or local storage media to provide an ade-
quate user experience.
The AT91SAM9G45 supports the latest generation of DDR2 and NAND Flash memory inter-
faces for program and data storage. An internal 133 MHz multi-layer bus architecture associated
with 37 DMA channels, a dual external bus interface and distributed memory including a 64-
Kbyte SRAM which can be configured as a tightly coupled memory (TCM) sustains the high
bandwidth required by the processor and the high speed peripherals.
The I/Os support 1.8V or 3.3V operation, which are independently configurable for the memory
interface and peripheral I/Os. This feature completely eliminates the need for any external level
shifters. In addition it supports 0.8 ball pitch package for low cost PCB manufacturing.
The AT91SAM9G45 power management controller features efficient clock gating and a battery
backup section minimizing power consumption in active and standby modes.
2 AT91SAM9G45
6438B–ATARM–29-Jul-09


Features Datasheet pdf Features • 400 MHz ARM926EJ-S™ ARM® Thumb® Processor – 32 KBytes Data C ache, 32 KBytes Instruction Cache, MMU • Memories – Dual External Bus Inte rface supporting 4-bank DDR2/LPDDR, SDR AM/LPSDR, Static Memories, CompactFlash , SLC NAND Flash with ECC – One 64-kb yte internal SRAM, single-cycle access at system speed or processor speed thro ugh TCM interface – One 64-kbyte inte rnal ROM, embedding bootstrap routine Peripherals – LCD Controller suppo rting STN and TFT displays up to 1280*8 60 – ITU-R BT. 601/656 Image Sensor I nterface – USB Device High Speed, USB Host High Speed and USB Host Full Spee d with OnChip Transceiver – 10/100 Mb ps Ethernet MAC Controller – Two High Speed Memory Card Hosts (SDIO, SDCard, MMC) – AC'97 controller – Two Mast er/Slave Serial Peripheral Interfaces Two Three-channel 32-bit Timer/Count ers – Two Synchronous Serial Controll ers (I2S mode) – Four-channel 16-bit PWM Controller – Two Two-wire Interfaces – Four USARTs with ISO7816, IrDA, Manchester and SPI modes –.
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