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LCD Controller. SED1335F Datasheet

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LCD Controller. SED1335F Datasheet






SED1335F Controller. Datasheet pdf. Equivalent




SED1335F Controller. Datasheet pdf. Equivalent





Part

SED1335F

Description

Graphic LCD Controller



Feature


PF577-03 SED1335F a olt n V de tio Wi p era cts O rodu P ge Graphic LCD Contro ller q For Medium-scale LCD q Wide Oper ating Voltage 2.7 to 5.0V q On Chip Cha racter Generator ROM s DESCRIPTION The SED1335F is a graphics and character d isplay controller for use with medium s cale dot matrix LCDs. The SED1335F gene rates all the signals required by the d isplay memory and .
Manufacture

Epson

Datasheet
Download SED1335F Datasheet


Epson SED1335F

SED1335F; LCD drivers, and incorporates a characte r generator ROM, so that flexible, low power, display systems can be designed with a minimum number of external compo nents. The SED1335F's high speed MPU in terface can be configured for both 6800 family and 8080 family processors, and the rich command set allows the user t o create a layered display of character s and graphics, sc.


Epson SED1335F

roll the display, and assign display att ributes to selected areas of the screen with a minimum of MPU intervention. Th e controller also functions as a piplin e buffer between the MPU and display me mory so that low cost, medium speed SRA M can be used. The SED1335F character g enerator system supports user defined c haracters, which can be used alone, or in conjunction wit.


Epson SED1335F

h the on board character set. s FEATURE S q 6800 and 8080 family compatibility, 2-pin programmable q Software compatib le with SED1330 and SED1336 q Programma ble cursor movement q Flexible scrollin g ....Scrolling in both horizontal and vertical directions ....Scrolling of se lected areas of the display q Multimode display ....Up to 2 layers of mixed ch aracter and graphi.

Part

SED1335F

Description

Graphic LCD Controller



Feature


PF577-03 SED1335F a olt n V de tio Wi p era cts O rodu P ge Graphic LCD Contro ller q For Medium-scale LCD q Wide Oper ating Voltage 2.7 to 5.0V q On Chip Cha racter Generator ROM s DESCRIPTION The SED1335F is a graphics and character d isplay controller for use with medium s cale dot matrix LCDs. The SED1335F gene rates all the signals required by the d isplay memory and .
Manufacture

Epson

Datasheet
Download SED1335F Datasheet




 SED1335F
WOiPdpreeorVdauoticlottansge
PF577-03
SED1335F
Graphic LCD Controller
q For Medium-scale LCD
q Wide Operating Voltage 2.7 to 5.0V
q On Chip Character Generator ROM
s DESCRIPTION
The SED1335F is a graphics and character display controller for use with medium scale dot matrix LCDs.
The SED1335F generates all the signals required by the display memory and LCD drivers, and incorporates a
character generator ROM, so that flexible, low power, display systems can be designed with a minimum number
of external components.
The SED1335F's high speed MPU interface can be configured for both 6800 family and 8080 family processors,
and the rich command set allows the user to create a layered display of characters and graphics, scroll the
display, and assign display attributes to selected areas of the screen with a minimum of MPU intervention.
The controller also functions as a pipline buffer between the MPU and display memory so that low cost, medium
speed SRAM can be used.
The SED1335F character generator system supports user defined characters, which can be used alone, or in
conjunction with the on board character set.
s FEATURES
q 6800 and 8080 family compatibility, 2-pin pro-
grammable
q Software compatible with SED1330 and SED1336
q Programmable cursor movement
q Flexible scrolling
....Scrolling in both horizontal and vertical direc-
tions
....Scrolling of selected areas of the display
q Multimode display
....Up to 2 layers of mixed character and graphics
....Up to 3 layers of graphics
q Selectable display synthesis
....Display attribute s(reverse video, flashing,
etc.)for selected areas of the display
....Simple animation
q Supports 64K bytes of memory
....4K bytes of user definable characters
....60K bytes of display memory
q 160 JIS 5×7 pixel characters internal
q Supports external character ROM or RAM
....8×8 or 8×16 pixel characters
....Allows mixing of ROM RAM character sets
q Variable LCD duty cycle, from 1/2 to 1/256
q Low power CMOS fabrication
....5mA (typical)
....0.05µA(typical), standby
q Supply voltage 2.7 to 5.5V
q Package .. SED1335FOA: QFP5-60pin (plastic)
SED1335FOB: QFP6-60pin (plastic)
s BLOCK DIAGRAM
Video RAM
CG RAM
External
CG ROM
LCD with
SED 1180/SED1190
VRAM Interface
I/O Register
LCD Controller
Cursor Address
Controller
Display
Address
Controller
Refresh
Address
Counter
Dot Counter
MPU Interface
CG ROM
Layered
Display
Controller
OSC
1
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 SED1335F
s PIN CONFIGURATION
QFP5-60pin
XD 50 45 40 VA8
CS VA9
A0 VA10
VDD VA11
D0 VA12
D1
60 SED1335F0A 30
VA13
D2
D3
1 INDEX
29 NC
VA14
D4 VA15
D5
D6 5
VD0
VD1
6 10
15
20
VD2
SED1335F
QFP6-60pin
VD3
VD2
VD1
VD0
VA15
VA14
VA13
VA12
VA11
VA10
VA9
VA8
VA7
VA6
NC
45
46
31
30
SED1335F0B
INDEX
60 16
1 15
XD3
D7
D6
D5
D4
D3
D2
D1
D0
VDD
A0
CS
XD
XG
SEL1
s PIN DESCRIPTION
PIn No.
Pin Name
I/O
SED1335FOA SED1335FOB
Function
XG 54 17
I Oscillator terminal
Pin No.
Pin Name
I/O
SED1335FOA SED1335FOB
Function
VWR
44
7
O VRAM write signal
XD 55 18 O Oscillator terminal
VRD
46
9
O VRAM read signal
VDD
VSS
SEL1, 2
58
13
53•52
21
36
16•15
+5V Power supply
GND(0V) Power supply
I MPU interface format selection
VCE
45
8
XD3 to XD0 7 to 10 30 to 33
XSCL
12
35
O VRAM chip enable
O Dot data output bus to X driver
O Dot data shift clock for X driver
D0 to D7
59 to 60
1 to 6
22 to 29
A0 57 20
I/O Data bus
I Data type selection
XECL
11
34
O Chip enable shift clock for X driver
LP 14 37 O Dot data latch pulse
RD 50 13
WR 51 14
CS 56 19
I
80 series Read strobe signal
68 series "E" clock
WF
15
38
O Frame signal
I
80 series Write strobe signal
68 series R/W signal
YSCL
18
41
O Scan data shift clock for Y driver
I Chip select
YD 17 40 O Scan data output
RES
47
10
VA15 to VA0
2728
30 to 43
1 to 6
50 to 59
VD7 to VD0 19 to 26 42 to 49
I Reset
O VRAM address bus
I/O VRAM data bus
YDIS
16
39
O Power down signal when display OFF
NC : Non Connection
s ABSOLUTE MAXIMUM RATINGS
Rating
Supply voltage
Input voltage
Power dissipation
Operating temperature
Storage temperature
Soldering temperature and time
Symbol
VDD
VIN
PD
Topr
Tstg
Tsol
Value
–0.3 to 7.0
–0.3 to VDD+0.3
300
–20 to 75
–60 to 150
260°C, 10s (at lead)
(VSS = 0V)
Unit
V
V
mW
°C
°C
2




 SED1335F
SED1335F
s ELECTRICAL CHARACTERISTICS
q DC Electrical Characteristics (1)
Characteristic
Symbol
Condition
(VSS = 0V, VDD = 4.5 to 5.5V, Ta = –20 to 75°C)
Min. Typ. Max. Unit
Pin
Operating voltage
Register data retention voltage
High level input voltage
T
T Low level input voltage
L High level output voltage
Low level output voltage
High level input voltage
C
M Low level input voltage
O
S
High level output voltage
Low level output voltage
S
C
Positive trigger threshold voltage
H
M
I
T
T
Negative trigger threshold voltage
Input leakage current
Output leakage current
VDD
VOH
VIHT
VILT
VOHT
VOLT
VIHC
VILC
VOHC
VOLC
VT+
VT–
ILI
ILO
IOH = –5.0mA
IOL = 5.0mA
IOH = –2.0mA
IOL = 2.0mA
VIN = VDD/VSS
4.5 —
2.0
0.5×DD
VSS
2.4 —
——
0.8×VDD
VSS
VDD—0.4
0.5VDD
0.2VDD
0.7VDD
0.3VDD
0.05
— 0.10
5.5
6.0
VDD
0.2×VDD
VSS+0.4
VDD
0.2×VDD
VSS+0.4
0.8VDD
0.5VDD
2.0
5.0
V
V VDD
V D0 to D7,
V A0, CS, RD, WR,
VD0 to VD7,
V VA0 to VA15, VCE
V VRD, VWR
V SEL1, SEL2, YD,
V XD0 to XD3,
XSCL, YDIS,
V LP, WF, CL0,
V XECL, YSCL
V
V RES
µA
µA
Average operating current
Iopr
fOSC = 10MHz, No-load
256×200dot
11
15 mA VDD
Standby current
IQ
Sleep
XG, CS, RD = VDD
0.05
20 µA VDD
Oscillation frequency
External clock frequency
Feed back resistance
fOSC
fCL
Rf
AT X'tal
Duty 47.5%
1.0 — 10.0 MHz
1.0 — 10.0 MHz XG, XD
0.5 1.0 3.0 M
q DC Electrical Characteristics (2)
Characteristic
Symbol
Condition
(VSS = 0V, VDD = 4.5 to 5.5V, Ta = –20 to 75°C)
Min. Typ. Max. Unit
Pin
Operating voltage
Register data retention voltage
High level input voltage
T
T Low level input voltage
L High level output voltage
Low level output voltage
High level input voltage
C
M
Low level input voltage
O High level output voltage
S
Low level output voltage
S
C
Positive trigger threshold voltage
H
M
I
T
T
Negative trigger threshold voltage
Input leakage current
Output leakage current
VDD
VOH
VIHT
VILT
VOHT
VOLT
VIHC
VILC
VOHC
VOLC
VT+
VT–
ILI
ILO
IOH = –3.0mA
IOL = 3.0mA
IOH = –1.0mA
IOL = 1.0mA
VIN = VDD/VSS
2.7 3.5
2.0 —
0.8×VDD
VSS
VDD—0.4 —
——
0.8×VDD
VSS
VDD—0.4
0.5VDD
0.2VDD
0.7VDD
0.3VDD
0.05
— 0.10
4.5
6.0
VDD
0.2×VDD
VSS+0.4
VDD
0.2×VDD
VSS+0.4
0.8VDD
0.5VDD
2.0
5.0
V
V VDD
V D0 to D7
V A0, CS, RD, WR
VD0 to VD7
V VA0 to VA15,
V VCE,VRD, VWR
V SEL1, SEL2, YD
V XD0 to XD3,
XSCL, YDIS
V LP, WF, CL0,
V XECL, YSCL
V
RES
V
µA
µA
Average operating current
Standby current
Iopr
fOSC = 6.1MHz, No-load
256×200dot
IQ
Sleep
XG, CS, RD = VDD
3.5 7.0
VDD = 3.5V
— 0.05 20
mA VDD
µA VDD
Oscillation frequency
External clock frequency
Feed back resistance
fOSC
fCL
Rf
AT X'tal
Duty 47.5%
1.0 — 8.0 MHz
1.0 — 8.0 MHz XG, XD
0.7 1.0 4.0 M
3



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