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PFC Controller. AN-6961 Datasheet

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PFC Controller. AN-6961 Datasheet






AN-6961 Controller. Datasheet pdf. Equivalent




AN-6961 Controller. Datasheet pdf. Equivalent





Part

AN-6961

Description

Critical Conduction Mode PFC Controller



Feature


www.fairchildsemi.com AN-6961 Critical Conduction Mode PFC Controller Descrip tion This application note describes a power factor correction (PFC) circuit u sing the FAN6961. Both the features of this controller, as well as the operati on of the power factor correction circu it, are presented in detail. Based on t he proposed design guideline, a design example with detai.
Manufacture

Fairchild Semiconductor

Datasheet
Download AN-6961 Datasheet


Fairchild Semiconductor AN-6961

AN-6961; led parameters demonstrates the performa nce of the controller. Introduction Th e FAN6961 PFC controller is an 8-pin Bo undary Current Mode (BCM) IC intended f or controlling PFC pre-regulators. The FAN6961 provides a controlled on-time t o regulate the output DC voltage and ac hieve natural power factor correction. The maximum on-time of the switch is pr ogrammable to ensu.


Fairchild Semiconductor AN-6961

re safe operation during AC brownouts. A n innovative multi-vector error amplifi er is built in to provide rapid transie nt response and precise output voltage clamping. Once the output feedback loop is opened, the output driver (GD) is d isabled to provide protection of the sy stem. The start-up current is lower tha n 20µA and the operating current has b een reduced to 5mA..


Fairchild Semiconductor AN-6961

The supply voltage can be operated up t o 25V, maximizing application flexibili ty. The FAN6961 also enables cycle-by-c ycle current limiting protection for th e external power MOSFET. Figure 1. Pow er Factor Correction Circuit © 2009 F airchild Semiconductor Corporation Rev. 1.0.2 • 4/8/09 www.fairchildsemi.co m AN-6961 APPLICATION NOTE Basic Ope ration of the Boost C.

Part

AN-6961

Description

Critical Conduction Mode PFC Controller



Feature


www.fairchildsemi.com AN-6961 Critical Conduction Mode PFC Controller Descrip tion This application note describes a power factor correction (PFC) circuit u sing the FAN6961. Both the features of this controller, as well as the operati on of the power factor correction circu it, are presented in detail. Based on t he proposed design guideline, a design example with detai.
Manufacture

Fairchild Semiconductor

Datasheet
Download AN-6961 Datasheet




 AN-6961
www.fairchildsemi.com
AN-6961
Critical Conduction Mode PFC Controller
Description
This application note describes a power factor correction
(PFC) circuit using the FAN6961. Both the features of this
controller, as well as the operation of the power factor
correction circuit, are presented in detail. Based on the
proposed design guideline, a design example with detailed
parameters demonstrates the performance of the controller.
Introduction
The FAN6961 PFC controller is an 8-pin Boundary Current
Mode (BCM) IC intended for controlling PFC pre-regulators.
The FAN6961 provides a controlled on-time to regulate the
output DC voltage and achieve natural power factor
correction. The maximum on-time of the switch is
programmable to ensure safe operation during AC
brownouts. An innovative multi-vector error amplifier is built
in to provide rapid transient response and precise output
voltage clamping. Once the output feedback loop is opened,
the output driver (GD) is disabled to provide protection of
the system. The start-up current is lower than 20µA and the
operating current has been reduced to 5mA. The supply
voltage can be operated up to 25V, maximizing application
flexibility. The FAN6961 also enables cycle-by-cycle current
limiting protection for the external power MOSFET.
Figure 1. Power Factor Correction Circuit
© 2009 Fairchild Semiconductor Corporation
Rev. 1.0.2 • 4/8/09
www.fairchildsemi.com




 AN-6961
AN-6961
Basic Operation of the Boost Converter
APPLICATION NOTE
The typical boost converter and its operational waveforms
are shown in Figure 2, 3, and 4, respectively.
Lb +vL (t)
D
+ iL (t)
vg (t)
Q
+
Vo
Co Ro
Figure 2. Boost Converter
Lb +vL (t)
Lb +vL (t)
+ iL (t)
vg (t)
Q
+ iL (t)
vg (t)
+
vo
Co Ro
(a) Switch Q is ON (b) Switch Q is OFF
Figure 3. Switching Sequences of the Boost Converter
vL (t)
vg (t)
vo vg (t)
iL (t)
vg (t)
Lb
vo vg (t)
Lb
iL,avg (t)
Q
ton toff
Operation Principle
Switch Q is ON: When Q turns on, the rectifier diode D is
reverse-biased and output capacitor CO supplies load
current. The rectified AC line input voltage Vg(t) is applied to
the inductor Lb so that inductor current IL ramps up linearly
and can be expressed as:
IL
(ton
)
=
Vg (t)
Lb
(1)
Switch Q is OFF: When Q turns off, the voltage VO-Vg(t) is
applied to inductor Lb and the polarity on the inductor Lb is
reversed. The diode D is forward-biased in this stage. The
energy stored in the inductor Lb is delivered to supply load
current and output capacitor CO. The inductor current iL can
be expressed as:
IL
(toff
)
=
Vo
- Vg
Lb
(t)
(2)
Controlled On-Time: The on-time of the power MOSFET Q
is determined by the output of the error amplifier that
monitors the preregulator output voltage. With a low-
bandwidth error amplifier, the feedback signal is almost
constant during a half AC cycle, resulting a fixed on-time of
the power MOSFET at a specific AC voltage and some
certain output power level. Therefore, the peak inductor
current ILpk automatically follows the input voltage Vg(t),
achieving a natural power factor correction mechanism.
Figure 5 shows the typical inductor current waveform during
a half AC cycle.
iL, pk
vg (t)
iL,avg (t)
T
Figure 4. One-cycle Waveform of the Boost Converter
Gate
on Off
Tmin
fixed On -Time
Tmax
Figure 5. Controlled On-Time Inductor Current Waveform
Referring to Figure 4, considering one switching period the
average inductor current IL,ave(t) can be calculated by the
average area of triangle waveform of inductor current:
IL,avg
(t
)
=
⎢⎢Vg(t)
+
Vg (t)2
Vo - Vg (t)
ton
Ts
2 Lb
2
Ts
(3)
© 2009 Fairchild Semiconductor Corporation
Rev. 1.0.2 • 4/8/09
2
www.fairchildsemi.com




 AN-6961
AN-6961
Block Operation Description
Multi-Vector Error Amplifier
The FAN6961 has a trans-conductance type amplifier that
provides better dynamic performance. Referring to Figure 6,
the error amplifier output VEA is compared with a sawtooth
waveform to generate a fixed on-time. To achieve a low
input current THD, the variation of the on-time within one
input AC cycle should be very small. Therefore, the
bandwidth of the feedback loop should be set below 20Hz
to maintain a constant on-time for a line half-cycle.
Connecting a capacitance CEA, such as 1µF, between
COMP and GND is suggested.
PWM
Gate
Vds
VEA_ out
Sawtooth Generator
t
ton toff
t
iL (t)
Vg (t)
Lb
Vg (t)
Vo -Vg (t) t
Lb
t
Figure 6. Operation Waveforms of Fixed On Time
Technique
For fast transient response and precise clamping of the
output voltage overshoot and undershoot, the FAN6961 has
a built-in multi-vector error amplifier. Figure 7 shows the
block diagram of the multi-vector error amplifier. When the
variation of the feedback voltage exceeds +6% and -8% of
the reference voltage, the multi-vector error amplifier
adjusts its output impedance to increase the loop response.
2.65V
VO
2.3V
APPLICATION NOTE
Total Harmonic Distortion (THD) Optimization
As discusses previously, the FAN6961 uses the controlled
on-time technique to achieve power factor correction
mechanism. However, to get better THD at light load
condition, especially at high input voltage, a THD
optimization circuit is inserted into the FAN6961. With this
internal THD optimization circuit, the on-time of the power
MOSFET is modulated to further improve the THD
performance. The calculated on-time variation within one
line voltage period with the fixed on-time technique, and
after the THD optimization is added, are shown in Figure 8.
The calculated input current waveform is shown in Figure 9.
THD Optimization(Vac=90V,Vo=250V)
THD Optimization(Vac=264V,Vo=400V)
Fixed On Time(Vac=90V,Vo=250V)
Fixed On Time(Vac=264V,Vo=400V)
1.85E-05
1.65E-05
1.45E-05
1.25E-05
1.05E-05
8.50E-06
6.50E-06
4.50E-06
2.50E-06
5.00E-07
0 20 40 60 80 100 120 140 160
Time(S/10000)
Figure 8. MOS Turn-on Time Calculational Curve
(Before and After THD Optimization Circuit Added)
THD Optimization(Vac=90V,Vo=250V)
THD Optimization(Vac=264V,Vo=400V)
2.0
Fixed On Time(Vac=90V,Vo=250V)
Fixed On Time(Vac=264V,Vo=400V)
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
0
20 40 60 80 100 120 140 160
Time(S/10000)
Figure 9. Calculated Waveforms of the Input Current
(Before and After THD Optimization Circuit Added)
VEA_OUT
CEA
2 COMP
Vref(2.5V)
INV
Error
Amplifier
1
FAN6961
CO
Figure 7. Block Diagram of the Multi-Vector Error
Amplifier
© 2009 Fairchild Semiconductor Corporation
Rev. 1.0.2 • 4/8/09
3
www.fairchildsemi.com



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